JPS56135241A - Data processing system - Google Patents

Data processing system

Info

Publication number
JPS56135241A
JPS56135241A JP3808080A JP3808080A JPS56135241A JP S56135241 A JPS56135241 A JP S56135241A JP 3808080 A JP3808080 A JP 3808080A JP 3808080 A JP3808080 A JP 3808080A JP S56135241 A JPS56135241 A JP S56135241A
Authority
JP
Japan
Prior art keywords
additional processor
cpu1
interface device
maintenance panel
maintenance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3808080A
Other languages
Japanese (ja)
Inventor
Nobuyoshi Sato
Toshio Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3808080A priority Critical patent/JPS56135241A/en
Publication of JPS56135241A publication Critical patent/JPS56135241A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/02—Input arrangements using manually operated switches, e.g. using keyboards or dials
    • G06F3/023—Arrangements for converting discrete items of information into a coded form, e.g. arrangements for interpreting keyboard generated codes as alphanumeric codes, operand codes or instruction codes

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To enable access to an additional processor from a maintenance panel by sending a signal, which is equivalent to a control signal sent from CPU to an interface device to control the additional processor, from the maintenance panel to the interface device via CPU. CONSTITUTION:To CPU1 of a data processing system, memory device 2 and additional processor 5 are connected via interface device 3, and to CPU1, maintenance console panel 4 provided newly with switches 19 and 20 is connected via address bus 21 and data bus 22. In CPU1, switch signals of switches 19 and 20 are ORed by OR gates 15 and 16 with the output of microinstruction decoder 14 and that of selective signal part 13, and an address is supplied to address decoder 18 of device 3. Then, access to additional processor 5 from maintenance panel 4 is attained without providing a new maintenance panel dedicated to additional processor 5.
JP3808080A 1980-03-25 1980-03-25 Data processing system Pending JPS56135241A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3808080A JPS56135241A (en) 1980-03-25 1980-03-25 Data processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3808080A JPS56135241A (en) 1980-03-25 1980-03-25 Data processing system

Publications (1)

Publication Number Publication Date
JPS56135241A true JPS56135241A (en) 1981-10-22

Family

ID=12515499

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3808080A Pending JPS56135241A (en) 1980-03-25 1980-03-25 Data processing system

Country Status (1)

Country Link
JP (1) JPS56135241A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61221824A (en) * 1985-03-01 1986-10-02 Fujitsu Ltd Console control system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61221824A (en) * 1985-03-01 1986-10-02 Fujitsu Ltd Console control system

Similar Documents

Publication Publication Date Title
AU585076B2 (en) Interrupt handling in a multiprocessor computing system
JPS5463634A (en) Bus controller
JPS5717019A (en) Numerical controller
JPS56135241A (en) Data processing system
JPS576947A (en) Test processing system of on-line process system
JPS5680722A (en) Interprocessor control system
JPS641050A (en) Computer system provided with byte order conversion mechanism
JPS57113169A (en) Microcomputer
JPS56116138A (en) Input and output controller
JPS55157022A (en) Output circuit for microcomputer
JPS54137941A (en) Multiprocessor system
JPS5271147A (en) Common panel control system for data processing unit
JPS5599656A (en) Interruption processor
JPS5563442A (en) Address set control system
JPS5720862A (en) Signal process arithmetic processor
FR2412107A1 (en) Programmed logic system - has logic control circuit decoding data signals from program memory
JPS5752933A (en) Input and output control system
JPS5654509A (en) Sequence controller
JPS5699531A (en) Control method for bus usufructuary right of direct memory access channel
JPS57174721A (en) Power supply controller
JPS5515503A (en) Allocation control system for interruption request line
JPS57130149A (en) System for interruption processing of microprogram control device
JPS57164363A (en) Simulation system in multi-processor system
JPS56155453A (en) Program execution controlling system
JPS6435633A (en) Interruption control system