JPS56130896A - Serial memory device - Google Patents

Serial memory device

Info

Publication number
JPS56130896A
JPS56130896A JP3196780A JP3196780A JPS56130896A JP S56130896 A JPS56130896 A JP S56130896A JP 3196780 A JP3196780 A JP 3196780A JP 3196780 A JP3196780 A JP 3196780A JP S56130896 A JPS56130896 A JP S56130896A
Authority
JP
Japan
Prior art keywords
shift
memory
memory device
shift pulse
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3196780A
Other languages
Japanese (ja)
Inventor
Shoji Kaneko
Yasaburo Inagaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3196780A priority Critical patent/JPS56130896A/en
Publication of JPS56130896A publication Critical patent/JPS56130896A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To increase the density of memory and to reduce the number of terminals, by replacing the address buffer and decoder of the serial memory device arranging memory cell in matrix shape into shift registers. CONSTITUTION:When an input is given to the control timing generating circuit 90', the X shift register 100 shifts the shift pulse by 1-bit with the clock B, and carry shift pulse is input again to the initial location, and the shift pulse of the Y shift register 110 is shifted by 1 bit. Thus, the memory cell at the location where the shift pulse is present in the register 110 is selected, and n-sets of cells are selected and the cell information is reproduced at the reproduction circuit 20 every row of memory cells in m-row and n-column when the clock A is input, and the write-in and readout of the information are made via the data-in and dataout buffer circuits 70, 80 to constitute the serial memory device in which the address buffer and decoder are replaced into the shift register. As a result, the memory is highly integrated and the number of terminals can be reduced.
JP3196780A 1980-03-13 1980-03-13 Serial memory device Pending JPS56130896A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3196780A JPS56130896A (en) 1980-03-13 1980-03-13 Serial memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3196780A JPS56130896A (en) 1980-03-13 1980-03-13 Serial memory device

Publications (1)

Publication Number Publication Date
JPS56130896A true JPS56130896A (en) 1981-10-14

Family

ID=12345715

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3196780A Pending JPS56130896A (en) 1980-03-13 1980-03-13 Serial memory device

Country Status (1)

Country Link
JP (1) JPS56130896A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0253295A (en) * 1988-08-17 1990-02-22 Nec Kyushu Ltd Address generation circuit
JP2002013993A (en) * 2000-04-25 2002-01-18 Sony Corp Active matrix circuit and driving method thereof, and surface pressure distribution detecting device
JP2010091561A (en) * 2000-04-25 2010-04-22 Sony Corp Signal output device and signal input device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0253295A (en) * 1988-08-17 1990-02-22 Nec Kyushu Ltd Address generation circuit
JP2002013993A (en) * 2000-04-25 2002-01-18 Sony Corp Active matrix circuit and driving method thereof, and surface pressure distribution detecting device
JP2010091561A (en) * 2000-04-25 2010-04-22 Sony Corp Signal output device and signal input device

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