JPS56112677A - Timer circuit - Google Patents
Timer circuitInfo
- Publication number
- JPS56112677A JPS56112677A JP1541880A JP1541880A JPS56112677A JP S56112677 A JPS56112677 A JP S56112677A JP 1541880 A JP1541880 A JP 1541880A JP 1541880 A JP1541880 A JP 1541880A JP S56112677 A JPS56112677 A JP S56112677A
- Authority
- JP
- Japan
- Prior art keywords
- counter
- time intervals
- pulses
- timer
- decorder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G04—HOROLOGY
- G04F—TIME-INTERVAL MEASURING
- G04F1/00—Apparatus which can be set and started to measure-off predetermined or adjustably-fixed time intervals without driving mechanisms, e.g. egg timers
- G04F1/005—Apparatus which can be set and started to measure-off predetermined or adjustably-fixed time intervals without driving mechanisms, e.g. egg timers using electronic timing, e.g. counting means
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Predetermined Time Intervals (AREA)
- Pulse Circuits (AREA)
- Electronic Switches (AREA)
Abstract
PURPOSE:To enable high speed and longer period operation and also to have precise time intervals after being left uncounted during the counting, by forming a timer whereby clock pulses are counted digitally. CONSTITUTION:The clock signals are feed to the counter 11 from the clock oscillator 12. The outputs of the binary count terminals Q1, Q2,...Qm-1, Qm of the counter 11 are fed to the decorder 14. The outputs of the decorder 14 are fed to the reset terminal R of the set/reset type flip-flop 13. The phase of the load pulse when input to the input terminal LOAD of the counter 11 is selected by the phase selecting switch 15. When pulses of desired time intervals are applied to the timer, the output pulses with 2<n> times or 1/(2<n>) times said time intervals the generated after the lapse of preliminerily fixed time.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1541880A JPS56112677A (en) | 1980-02-13 | 1980-02-13 | Timer circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1541880A JPS56112677A (en) | 1980-02-13 | 1980-02-13 | Timer circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56112677A true JPS56112677A (en) | 1981-09-05 |
JPH0142165B2 JPH0142165B2 (en) | 1989-09-11 |
Family
ID=11888203
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1541880A Granted JPS56112677A (en) | 1980-02-13 | 1980-02-13 | Timer circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56112677A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5152270A (en) * | 1974-10-31 | 1976-05-08 | Mitsubishi Electric Corp | PARUSUHABAHENKANSOCHI |
JPS5167050A (en) * | 1974-12-09 | 1976-06-10 | Furuno Electric Co |
-
1980
- 1980-02-13 JP JP1541880A patent/JPS56112677A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5152270A (en) * | 1974-10-31 | 1976-05-08 | Mitsubishi Electric Corp | PARUSUHABAHENKANSOCHI |
JPS5167050A (en) * | 1974-12-09 | 1976-06-10 | Furuno Electric Co |
Also Published As
Publication number | Publication date |
---|---|
JPH0142165B2 (en) | 1989-09-11 |
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