JPS56111935A - Direct memory access system - Google Patents

Direct memory access system

Info

Publication number
JPS56111935A
JPS56111935A JP1458380A JP1458380A JPS56111935A JP S56111935 A JPS56111935 A JP S56111935A JP 1458380 A JP1458380 A JP 1458380A JP 1458380 A JP1458380 A JP 1458380A JP S56111935 A JPS56111935 A JP S56111935A
Authority
JP
Japan
Prior art keywords
dma
controller
data
input
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1458380A
Other languages
English (en)
Inventor
Masao Osawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Electric Manufacturing Co Ltd
Priority to JP1458380A priority Critical patent/JPS56111935A/ja
Publication of JPS56111935A publication Critical patent/JPS56111935A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP1458380A 1980-02-08 1980-02-08 Direct memory access system Pending JPS56111935A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1458380A JPS56111935A (en) 1980-02-08 1980-02-08 Direct memory access system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1458380A JPS56111935A (en) 1980-02-08 1980-02-08 Direct memory access system

Publications (1)

Publication Number Publication Date
JPS56111935A true JPS56111935A (en) 1981-09-04

Family

ID=11865179

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1458380A Pending JPS56111935A (en) 1980-02-08 1980-02-08 Direct memory access system

Country Status (1)

Country Link
JP (1) JPS56111935A (ja)

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