JPS56110155A - Microprogram control system - Google Patents

Microprogram control system

Info

Publication number
JPS56110155A
JPS56110155A JP1316780A JP1316780A JPS56110155A JP S56110155 A JPS56110155 A JP S56110155A JP 1316780 A JP1316780 A JP 1316780A JP 1316780 A JP1316780 A JP 1316780A JP S56110155 A JPS56110155 A JP S56110155A
Authority
JP
Japan
Prior art keywords
machine language
register
pla406
memory device
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1316780A
Other languages
Japanese (ja)
Other versions
JPS6155693B2 (en
Inventor
Shigeo Shimazaki
Hiroshi Nishikawa
Katsura Kawakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1316780A priority Critical patent/JPS56110155A/en
Publication of JPS56110155A publication Critical patent/JPS56110155A/en
Publication of JPS6155693B2 publication Critical patent/JPS6155693B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/261—Microinstruction address formation

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To efficiently execute the parallel processing by obtaining a signal for starting to read out the machine language instruction from the main memory device, from the means for generating the address of the microprogram memory device. CONSTITUTION:The machine language is generated from the main memory device 402 by the input/output control part 404, and it is retained in the register. The contents of this register 405 are input to the programmable logic array PLA406, the head address of the microprogram corresponding to the machine language instruction retained in the register 405 is generated by the PLA406, it is provided to the register 407, also the signal 412 is provided to the device 402 from the PLA406, and a new machine language is read out. As a result, the information route in the process extending from the machine language instruction to obtaining the signal 412 becomes 405 406 412, and also it is possible to process in parallel both the operation process for preparing a new machine language instruction to the register 405, and the process for reading out the microinstruction.
JP1316780A 1980-02-05 1980-02-05 Microprogram control system Granted JPS56110155A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1316780A JPS56110155A (en) 1980-02-05 1980-02-05 Microprogram control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1316780A JPS56110155A (en) 1980-02-05 1980-02-05 Microprogram control system

Publications (2)

Publication Number Publication Date
JPS56110155A true JPS56110155A (en) 1981-09-01
JPS6155693B2 JPS6155693B2 (en) 1986-11-28

Family

ID=11825610

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1316780A Granted JPS56110155A (en) 1980-02-05 1980-02-05 Microprogram control system

Country Status (1)

Country Link
JP (1) JPS56110155A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5048852A (en) * 1973-09-01 1975-05-01
JPS50144551U (en) * 1974-05-15 1975-11-28
JPS533043A (en) * 1976-06-30 1978-01-12 Toshiba Corp Electronic computer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5048852A (en) * 1973-09-01 1975-05-01
JPS50144551U (en) * 1974-05-15 1975-11-28
JPS533043A (en) * 1976-06-30 1978-01-12 Toshiba Corp Electronic computer

Also Published As

Publication number Publication date
JPS6155693B2 (en) 1986-11-28

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