JPS5794851A - Instruction fetch control system - Google Patents

Instruction fetch control system

Info

Publication number
JPS5794851A
JPS5794851A JP55170543A JP17054380A JPS5794851A JP S5794851 A JPS5794851 A JP S5794851A JP 55170543 A JP55170543 A JP 55170543A JP 17054380 A JP17054380 A JP 17054380A JP S5794851 A JPS5794851 A JP S5794851A
Authority
JP
Japan
Prior art keywords
instruction
branch
address
designated
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55170543A
Other languages
Japanese (ja)
Inventor
Hideaki Ando
Hisashi Ibe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55170543A priority Critical patent/JPS5794851A/en
Publication of JPS5794851A publication Critical patent/JPS5794851A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30058—Conditional branch instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To increase the instruction fetching speed, by reading the cotents of a region of a local storage device which is designated through an instruction address designating part or a specific register and feeding this contents to a main storage device in the form of the address information. CONSTITUTION:A machine instruction of the BRANCH system is read out of a main storage device 1 and set to a main storage data register 2. Thus a BRANCH instruction process microprogram is selected and executed. In case the BRANCH is successful, an instruction address designating part of a machine instruction fetching microinstruction indicates a specific region LOA of a local storage 5. While an instruction address register LIA is designated in case the BRANCH is not successful. When the machine instruction fetching microinstruction is executed, the data is read out of the LOA or LIA to be fed to the device 1 via a local storage data register 6 an in the form of the address information. Then the machine instruction is read for an address which is designated by the data.
JP55170543A 1980-12-03 1980-12-03 Instruction fetch control system Pending JPS5794851A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55170543A JPS5794851A (en) 1980-12-03 1980-12-03 Instruction fetch control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55170543A JPS5794851A (en) 1980-12-03 1980-12-03 Instruction fetch control system

Publications (1)

Publication Number Publication Date
JPS5794851A true JPS5794851A (en) 1982-06-12

Family

ID=15906839

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55170543A Pending JPS5794851A (en) 1980-12-03 1980-12-03 Instruction fetch control system

Country Status (1)

Country Link
JP (1) JPS5794851A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60114944A (en) * 1983-11-25 1985-06-21 Fujitsu Ltd Instruction address control system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5423343A (en) * 1977-07-22 1979-02-21 Nec Corp Microprogram controller

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5423343A (en) * 1977-07-22 1979-02-21 Nec Corp Microprogram controller

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60114944A (en) * 1983-11-25 1985-06-21 Fujitsu Ltd Instruction address control system
JPH0454257B2 (en) * 1983-11-25 1992-08-28 Fujitsu Ltd

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