JPS56108272A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS56108272A JPS56108272A JP1075480A JP1075480A JPS56108272A JP S56108272 A JPS56108272 A JP S56108272A JP 1075480 A JP1075480 A JP 1075480A JP 1075480 A JP1075480 A JP 1075480A JP S56108272 A JPS56108272 A JP S56108272A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- source
- type
- gate
- layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 239000010410 layer Substances 0.000 abstract 11
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
- 238000001020 plasma etching Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
- 239000002344 surface layer Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1066—Gate region of field-effect devices with PN junction gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
PURPOSE:To decrease the junction capacitance between the source and the gate in a semiconductor device in which a gate layers of semiconductor with the first conductivity type are buried between the drain and source layers of semiconductor with the second conductivity type, by removing the portions unnecessary for operation from the junction portions between the source and gate layers. CONSTITUTION:On an N<+> type Si substrate 1', an N<-> type epitaxial layer 2' to be a drain layer is grown, and in the surface layer thereof a plurality of P<+> type gate layers 3 are formed at given intervals by diffusion. Then, an N type epitaxial source layer 4' is grown on the whole surface including them and all coated with an N<+> type source ohmic contact layer 5'. Then, of the P-N junctions on the layer 3', the layer 5' and 4' not participating in operation are removed by plasma etching having directivity so that only P-N junction portions A' between the remaining layers 3' and 4' are allowed to participate in the capacity value. Thereby, the junction capacitance between the source and the gate is decreased so that a high power and high speed device can be obtained.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1075480A JPS56108272A (en) | 1980-01-31 | 1980-01-31 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1075480A JPS56108272A (en) | 1980-01-31 | 1980-01-31 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS56108272A true JPS56108272A (en) | 1981-08-27 |
Family
ID=11759099
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1075480A Pending JPS56108272A (en) | 1980-01-31 | 1980-01-31 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56108272A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5343483A (en) * | 1976-10-01 | 1978-04-19 | Handotai Kenkyu Shinkokai | Semiconductor device |
-
1980
- 1980-01-31 JP JP1075480A patent/JPS56108272A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5343483A (en) * | 1976-10-01 | 1978-04-19 | Handotai Kenkyu Shinkokai | Semiconductor device |
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