JPS56107681A - Synchronization pulling-in circuit - Google Patents

Synchronization pulling-in circuit

Info

Publication number
JPS56107681A
JPS56107681A JP1033880A JP1033880A JPS56107681A JP S56107681 A JPS56107681 A JP S56107681A JP 1033880 A JP1033880 A JP 1033880A JP 1033880 A JP1033880 A JP 1033880A JP S56107681 A JPS56107681 A JP S56107681A
Authority
JP
Japan
Prior art keywords
signal
input
horizontal synchronizing
frequency divider
ntsc system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1033880A
Other languages
Japanese (ja)
Other versions
JPS6351440B2 (en
Inventor
Yasushi Sano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1033880A priority Critical patent/JPS56107681A/en
Publication of JPS56107681A publication Critical patent/JPS56107681A/en
Publication of JPS6351440B2 publication Critical patent/JPS6351440B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N11/00—Colour television systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Color Television Systems (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE:To provide a stable output to a television horizontal synchronizing signal of the NTSC system containing a jitter component, by inhibiting a set signal of the counter, in case when the phase difference of a television horizontal synchronizing signal of the NTSC system, and a signal which is generated from a frequency dividing circuit is less than a fixed value. CONSTITUTION:When a jitter component is contained in the horizontal synchronizing signal separated from the television signal of the NTSC system, even if a signal having the jitters of the pulse width T or less of the output signal (c) of the pulse generator 5 has been input, the set signal is not input to the frequency divider 3. Even in case when a signal having the jitters of the pulse width T or more the signal (c) is input, if the ratio of the horizontal synchronizing signal which is input into the section T is 1/2 or more, the set signal of the frequency divider 3 is not generated by the control of the signal output of the memory circuit 7. As a result, the frequency divider 3 is able to execute a stable operation.
JP1033880A 1980-01-31 1980-01-31 Synchronization pulling-in circuit Granted JPS56107681A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1033880A JPS56107681A (en) 1980-01-31 1980-01-31 Synchronization pulling-in circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1033880A JPS56107681A (en) 1980-01-31 1980-01-31 Synchronization pulling-in circuit

Publications (2)

Publication Number Publication Date
JPS56107681A true JPS56107681A (en) 1981-08-26
JPS6351440B2 JPS6351440B2 (en) 1988-10-13

Family

ID=11747401

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1033880A Granted JPS56107681A (en) 1980-01-31 1980-01-31 Synchronization pulling-in circuit

Country Status (1)

Country Link
JP (1) JPS56107681A (en)

Also Published As

Publication number Publication date
JPS6351440B2 (en) 1988-10-13

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