JPS56104544A - Frequency compounding device - Google Patents

Frequency compounding device

Info

Publication number
JPS56104544A
JPS56104544A JP646480A JP646480A JPS56104544A JP S56104544 A JPS56104544 A JP S56104544A JP 646480 A JP646480 A JP 646480A JP 646480 A JP646480 A JP 646480A JP S56104544 A JPS56104544 A JP S56104544A
Authority
JP
Japan
Prior art keywords
frequency
signal
output
error signal
oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP646480A
Other languages
Japanese (ja)
Inventor
Yoshiharu Shigeta
Atsuyuki Takahara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP646480A priority Critical patent/JPS56104544A/en
Publication of JPS56104544A publication Critical patent/JPS56104544A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To maintain a high-speed frequency switching response and to ensure a stable working in the steady state through lowering the feedback gain, by inserting a simple variable gain circuit into the frequency compounding device to secure a high feedback gain under the nonphase synchronous state. CONSTITUTION:The frequency phase comparator 2 compares both the frequency and the phase between the reference signal fR supplied from the reference frequency oscillator 1 and the output signal obtained by giving a step-down to the output frequency of fO of voltage controlling oscillator 4 through the variable frequency step- down device 5. Thus an error signal is obtained to be supplied to next variable gain device 6. In case the pulse of the error signal in the device 6 has a wide waveform, the higher harmonic component is excluded through a low pass filter of the resistance 7 and capacitor 8 to obtain a signal having a reduced distortion. This signal is transmitted to the output via a diode, while the signal having a small duration has a reduced waveform amplitude and does not pass through the diode to be delivered via the resistance 11. Thus the voltage control oscillator 4 is controlled by the output of the device 6 via the low pass filter 3. When the error signal has a large pulse duration due to a switching of frequency or the like, the feedback gain is increased to accelerate the response speed.
JP646480A 1980-01-23 1980-01-23 Frequency compounding device Pending JPS56104544A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP646480A JPS56104544A (en) 1980-01-23 1980-01-23 Frequency compounding device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP646480A JPS56104544A (en) 1980-01-23 1980-01-23 Frequency compounding device

Publications (1)

Publication Number Publication Date
JPS56104544A true JPS56104544A (en) 1981-08-20

Family

ID=11639161

Family Applications (1)

Application Number Title Priority Date Filing Date
JP646480A Pending JPS56104544A (en) 1980-01-23 1980-01-23 Frequency compounding device

Country Status (1)

Country Link
JP (1) JPS56104544A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999063670A1 (en) * 1998-06-04 1999-12-09 Adc Telecommunications, Inc. Phase-locked loop with a loop filter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999063670A1 (en) * 1998-06-04 1999-12-09 Adc Telecommunications, Inc. Phase-locked loop with a loop filter
US6064273A (en) * 1998-06-04 2000-05-16 Adc Telecommunications Phase-locked loop having filter with wide and narrow bandwidth modes

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