JPS56100529A - Receiving device - Google Patents
Receiving deviceInfo
- Publication number
- JPS56100529A JPS56100529A JP232480A JP232480A JPS56100529A JP S56100529 A JPS56100529 A JP S56100529A JP 232480 A JP232480 A JP 232480A JP 232480 A JP232480 A JP 232480A JP S56100529 A JPS56100529 A JP S56100529A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- control
- tuning
- signal
- perform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
- H03J7/00—Automatic frequency control; Automatic scanning over a band of frequencies
- H03J7/02—Automatic frequency control
- H03J7/04—Automatic frequency control where the frequency control is accomplished by varying the electrical characteristics of a non-mechanically adjustable element or where the nature of the frequency controlling element is not significant
- H03J7/06—Automatic frequency control where the frequency control is accomplished by varying the electrical characteristics of a non-mechanically adjustable element or where the nature of the frequency controlling element is not significant using counters or frequency dividers
- H03J7/065—Automatic frequency control where the frequency control is accomplished by varying the electrical characteristics of a non-mechanically adjustable element or where the nature of the frequency controlling element is not significant using counters or frequency dividers the counter or frequency divider being used in a phase locked loop
Landscapes
- Superheterodyne Receivers (AREA)
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
Abstract
PURPOSE:To perform preset channel selection due to digital control of frequency division ratio N or holding of tuning due to AFC, by incorporating or separating the local oscillator into or from the PLL. CONSTITUTION:When the tuning state is good and muting control signal Sm becomes 1, the tuning frequency is changed according to change of the local oscillation frequency by control voltage Vc to perform frequency control. Since muting control signal Sm becomes 0 when the tuning state is not good, the signal corresponding to the local oscillation frequency and the reference signal of a prescribed frequency are compared in phase by 23, and the variable frequency oscillator is controlled by the comparison signal to perform the control for the phase locked loop.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP232480A JPS6059767B2 (en) | 1980-01-12 | 1980-01-12 | receiving device |
US06/195,474 US4344187A (en) | 1979-10-18 | 1980-10-09 | Radio receiver with system for maintaining optimum tuning |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP232480A JPS6059767B2 (en) | 1980-01-12 | 1980-01-12 | receiving device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56100529A true JPS56100529A (en) | 1981-08-12 |
JPS6059767B2 JPS6059767B2 (en) | 1985-12-26 |
Family
ID=11526130
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP232480A Expired JPS6059767B2 (en) | 1979-10-18 | 1980-01-12 | receiving device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6059767B2 (en) |
-
1980
- 1980-01-12 JP JP232480A patent/JPS6059767B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS6059767B2 (en) | 1985-12-26 |
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