JPS5599824A - Background noise generator for simulation video - Google Patents

Background noise generator for simulation video

Info

Publication number
JPS5599824A
JPS5599824A JP618879A JP618879A JPS5599824A JP S5599824 A JPS5599824 A JP S5599824A JP 618879 A JP618879 A JP 618879A JP 618879 A JP618879 A JP 618879A JP S5599824 A JPS5599824 A JP S5599824A
Authority
JP
Japan
Prior art keywords
signal
output
taking
oscillator
background noise
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP618879A
Other languages
Japanese (ja)
Inventor
Yoshihiro Iwata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP618879A priority Critical patent/JPS5599824A/en
Publication of JPS5599824A publication Critical patent/JPS5599824A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/84Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators

Abstract

PURPOSE:To generate the background noise required for simulation video, by taking the random noise produced as the signal of specified pulse width, taking logical product between the frequency dividing output and the comparison output of the integration output of two oscillators, taking the logical sum for a plurality of outputs and introducing them to CRT. CONSTITUTION:The random noise generated from the noise generator 1 is converted into digital signal via the counter 2 and decoder 3, this digital signal is fed to the monostable multivibrators 4...4<n> and the output signal 13 having specified pulse width can be obtained. Further, the signal 13 is fed to the frequency dividers 5...5<n> to obtain the signal frequency dividing the output signal of specified pulse width. On the other hand, the signal integrating 11 the output signal of the oscillator 9 and the signal integrating 11' the output signal of the oscillator 9' which is asynchronous with the oscillator 9 and has non-ietegral multiple of frequency are compared at the comparison circuit 12, this comparison output signal and each frequency dividing signal are taken for ANDs 6...6<n>, and the output is fed to CRT8 after taking logical sum 7. Accordingly, the background noise of simulation video required can be produced with a simple constitution.
JP618879A 1979-01-24 1979-01-24 Background noise generator for simulation video Pending JPS5599824A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP618879A JPS5599824A (en) 1979-01-24 1979-01-24 Background noise generator for simulation video

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP618879A JPS5599824A (en) 1979-01-24 1979-01-24 Background noise generator for simulation video

Publications (1)

Publication Number Publication Date
JPS5599824A true JPS5599824A (en) 1980-07-30

Family

ID=11631575

Family Applications (1)

Application Number Title Priority Date Filing Date
JP618879A Pending JPS5599824A (en) 1979-01-24 1979-01-24 Background noise generator for simulation video

Country Status (1)

Country Link
JP (1) JPS5599824A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01169296U (en) * 1988-05-20 1989-11-29

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01169296U (en) * 1988-05-20 1989-11-29

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