JPS5696581A - Generating circuit for vertical blanking signal and virtual vertical synchronizing signal - Google Patents

Generating circuit for vertical blanking signal and virtual vertical synchronizing signal

Info

Publication number
JPS5696581A
JPS5696581A JP17174579A JP17174579A JPS5696581A JP S5696581 A JPS5696581 A JP S5696581A JP 17174579 A JP17174579 A JP 17174579A JP 17174579 A JP17174579 A JP 17174579A JP S5696581 A JPS5696581 A JP S5696581A
Authority
JP
Japan
Prior art keywords
signal
counter
circuit
output
vertical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17174579A
Other languages
Japanese (ja)
Other versions
JPS6355273B2 (en
Inventor
Mitsutoshi Magai
Masaaki Sakai
Kenji Nakano
Tadahiko Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP17174579A priority Critical patent/JPS5696581A/en
Publication of JPS5696581A publication Critical patent/JPS5696581A/en
Publication of JPS6355273B2 publication Critical patent/JPS6355273B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/91—Television signal processing therefor
    • H04N5/93—Regeneration of the television signal or of selected parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

PURPOSE:To obtain the blanking signal and the virtual vertical synchronizing signal through addition of a simple circuit, by outputting the vertical blanking signal, based on the operating signal of the rotating head and the 1st counter output of the counter counting the clocks in the mode of phase servo. CONSTITUTION:A vertical oscillation circuit 49 is constituted with differentiation circuits 63, 64, inverter 65, OR circuit 66 and FFs 67, 68 and the differentiation circuits 63, 64 are of digital constitution, and a switching signal from a switching pulse oscillator 30 is input to the circuits 63, 64. Further, the output of the OR circuit 66 sets FF67 and resets the reference oscillator 15 via a switch circuit 75. The oscillator 15 is provided with a counter, and the mode of phase servo is generated for the vertical blanking signal with the output of the 1st counter and the operation switch signal of the rotating head. Further, in the mode without phase servo, the counter is reset with a switching signal, and the virtual vertical synchronizing signal is output with the 2nd and 3rd outputs of the counter.
JP17174579A 1979-12-29 1979-12-29 Generating circuit for vertical blanking signal and virtual vertical synchronizing signal Granted JPS5696581A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17174579A JPS5696581A (en) 1979-12-29 1979-12-29 Generating circuit for vertical blanking signal and virtual vertical synchronizing signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17174579A JPS5696581A (en) 1979-12-29 1979-12-29 Generating circuit for vertical blanking signal and virtual vertical synchronizing signal

Publications (2)

Publication Number Publication Date
JPS5696581A true JPS5696581A (en) 1981-08-04
JPS6355273B2 JPS6355273B2 (en) 1988-11-01

Family

ID=15928892

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17174579A Granted JPS5696581A (en) 1979-12-29 1979-12-29 Generating circuit for vertical blanking signal and virtual vertical synchronizing signal

Country Status (1)

Country Link
JP (1) JPS5696581A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59147573A (en) * 1983-02-14 1984-08-23 Hitachi Ltd Forming circuit of pseudo vertical synchronizing signal
JPS60249487A (en) * 1984-05-24 1985-12-10 Sanyo Electric Co Ltd Video signal processing method
JPS6413868U (en) * 1987-07-14 1989-01-24

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59147573A (en) * 1983-02-14 1984-08-23 Hitachi Ltd Forming circuit of pseudo vertical synchronizing signal
JPH0155797B2 (en) * 1983-02-14 1989-11-27 Hitachi Ltd
JPS60249487A (en) * 1984-05-24 1985-12-10 Sanyo Electric Co Ltd Video signal processing method
JPS6413868U (en) * 1987-07-14 1989-01-24

Also Published As

Publication number Publication date
JPS6355273B2 (en) 1988-11-01

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