JPS60249487A - Video signal processing method - Google Patents

Video signal processing method

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Publication number
JPS60249487A
JPS60249487A JP59105350A JP10535084A JPS60249487A JP S60249487 A JPS60249487 A JP S60249487A JP 59105350 A JP59105350 A JP 59105350A JP 10535084 A JP10535084 A JP 10535084A JP S60249487 A JPS60249487 A JP S60249487A
Authority
JP
Japan
Prior art keywords
pulse
terminal
switching
circuit
video signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59105350A
Other languages
Japanese (ja)
Inventor
Takao Mizuno
水野 隆雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP59105350A priority Critical patent/JPS60249487A/en
Publication of JPS60249487A publication Critical patent/JPS60249487A/en
Pending legal-status Critical Current

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  • Picture Signal Circuits (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

PURPOSE:To prevent the disturbance of pictures at a reproducing time without requiring another switching pulse generating means by using the switching pulse of rotary magnetic heads to generate a pulse which inhibits noise elimination of a vertical synchronizing signal part. CONSTITUTION:The switching pulse from a pulse generating means 3 is differentiated by a differentiating circuit 6, and the negative pulse is cut by a diode 12 to take out only the rise pulse. The fall pulse is taken out by a differentiating circuit 5 and a diode 11 similarly, and they are synthesized and are given to the CL terminal of a flip-flop 21. A DC voltage VCC is applied to the D terminal of the flip-flop 21, and a pulse voltage dependent upon the time constant determined by a resistance 17, a diode 13, and an integrating circuit 18 is outputted to the Q terminal when the pulse voltage is applied to the CL terminal. This outputted pulse voltage is outputted for every head switching and is applied to a noise eliminating circuit having line correlations, and the noise eliminating circuit is unoperated during this time.

Description

【発明の詳細な説明】 印 産業上の利用分野 本発明は磁気録画再生装置における映像信号処理方法に
関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a video signal processing method in a magnetic recording/reproducing device.

(ロ)従来技術 磁気録画再生装置において、そのS/Nを改善するには
rNHKホームビデオ技術」(日本放送出版協会発行)
の第104頁の第8−7図に示す様な映像信号のライン
相関性を利用したライン相関雑音除去回路や、画像の輪
郭部を強調する輪郭補正回路等が利用されている。
(b) ``rNHK Home Video Technology to Improve S/N in Conventional Magnetic Recording and Playback Devices'' (published by Japan Broadcasting Publishing Association)
A line correlation noise removal circuit that utilizes the line correlation of a video signal as shown in FIG. 8-7 on page 104 of , a contour correction circuit that emphasizes the contour of an image, and the like are used.

しかし再生時において、前者の場合、映像信号にl H
(Hは水平同期信号の1周期)の相関かあると非常に有
効であるが、映像信号の垂直同期信号期間はインターレ
ースの関係よりフロントポーシンクチップ部にInの切
込みパルスを含んでいる為に1Hの相関がなくなり、垂
直同期信号期間にライン相関雑音除去回路を用いても垂
直同期信号は乱れ、テレビ画面のインターレースが行わ
れなくなる事があった。また文字多重放送の場合は垂直
同期信号期間のバックポーチにパルスコード等で送信が
行われる為、IHのライン相関性がなくなり、ライン相
関雑音除去回路を用いると文字多重放送は再生されなく
なる欠点があった。
However, during playback, in the former case, the video signal is
(H is one period of the horizontal synchronization signal) It is very effective if there is a correlation, but the vertical synchronization signal period of the video signal contains an In cut pulse in the front sync tip part due to the interlace relationship. 1H correlation disappears, and even if a line correlation noise removal circuit is used during the vertical synchronization signal period, the vertical synchronization signal is disturbed, and the interlacing of the television screen may not be performed. In addition, in the case of teletext broadcasting, transmission is performed using a pulse code etc. on the back porch of the vertical synchronization signal period, so there is no IH line correlation, and if a line correlation noise removal circuit is used, teletext broadcasting will not be reproduced. there were.

また後者の場合、文字多重放送時の垂直同期信号期間の
バックポーチへのパルスコード等の送信が乱される恐れ
があり、デコード時に誤動作する等の欠点があった。
In the latter case, there is a risk that the transmission of pulse codes and the like to the back porch during the vertical synchronization signal period during teletext broadcasting may be disrupted, resulting in drawbacks such as malfunctions during decoding.

(ハ) 発明の目的 本発明は前記欠点を除去するものであり、映像信号の垂
直同期信号期間の乱れを防止する映像信号処理方法を提
供することを°目的とする。
(c) Object of the Invention The present invention eliminates the above-mentioned drawbacks, and an object thereof is to provide a video signal processing method that prevents disturbances in the vertical synchronization signal period of a video signal.

に) 発明の構成 本発明は磁気録画再生装置において、映像信号を記録及
び再生する回転磁気ヘッドの切換用の切換パルスをパル
ス発生手段により発生し、該切換パルスの立上り及び立
下り、或は前記切換パルスの立上り及び立下りよりも所
定時間遅延した位置からパルス作成手段により所定幅の
パルスを作成し、該所定幅のパルスを制御部へ入力し、
前記所定幅のパルスと同一幅、同一タイゴングの制御出
力により前記映像信号における垂直同期信号部の全期間
或は一部期間のみライン相関関係を有する前記映像信号
用の画像処理回路を不動作と成す映像信号処理方法であ
る。
B) Structure of the Invention The present invention provides a magnetic recording and reproducing apparatus in which a switching pulse for switching a rotating magnetic head for recording and reproducing video signals is generated by a pulse generating means, and the rising and falling edges of the switching pulse, or the Creating a pulse with a predetermined width by a pulse creating means from a position delayed by a predetermined time from the rising and falling edges of the switching pulse, inputting the pulse with the predetermined width to the control unit,
The image processing circuit for the video signal having a line correlation is rendered inoperable during the entire period or only a part of the period of the vertical synchronization signal portion of the video signal by a control output having the same width and the same timing as the pulse of the predetermined width. This is a video signal processing method.

(ホ)実施例 本発明の詳細を図示の実施例により具体的に説明する。(e) Examples The details of the present invention will be specifically explained with reference to illustrated embodiments.

第1図は本発明の映像信号処理方法を実施する為の一実
施回路、第2図(イ)(ロ)(ハ)に)(ホ)(へ)(
ト)及び(ト)は、各々第1図のり、a、b、c、CL
、Q、Q及びRにおける波形図である。
FIG. 1 shows an implementation circuit for carrying out the video signal processing method of the present invention, and FIG.
G) and (G) are the glue in Figure 1, a, b, c, CL, respectively.
, Q, Q, and R waveform diagrams.

第1図について図番、回路構成及び回路動作を説明する
と、(11は電源端子、(2)は電源ライン、(3)は
パルス発生手段、(4)はPNP型のトランジスタ、(
5)t61は各々コンデンサ(力及び抵抗(8)、コン
デンサ(9)及び抵抗(10)より成る微分回路、αυ
(12(131&!ダイオード、a佃!19uenは抵
抗、餞は抵抗(11及びコンデンサ(詞より成る積分回
路、Cυはパルス作成手段としての遅延型の7リノプフ
ロツプ、(2壜は制御部、(ハ)はライン相関を有する
画像処理回路の一回路としての雑音除去回路であり、抵
抗α4)を介してパルス発生手段(3)とトランジスタ
(4)のペースを接続し、またそのエミッタを電源端子
(1)と接続した電源ライン(2)と接続すると共にコ
レクタをその負荷としての抵抗a句を介して接地し、か
つ微分回路(句の構成要素であるコンデンサ(力と接続
し、ダイオードaυのアノードを微分回路(句の構成要
素であるコンデンサ(7)及び抵抗(8)と接続し、抵
抗(161を介してそのカソードを接地すると共にフリ
ップフロップQυのCL端子及びダイオードazのカソ
ードと接続し、パルス発生手段(3)及びダイオード(
1′!Jのアノード間に微分回路りを介挿している。そ
してフリップフロップQ1)のD端子と電源ライン(2
)を接続し、Q及びQ端子と制御部(22の入力側を接
続すると共に制御部(ハ)の出力側と雑音除去回路(ハ
)を接続し、積分回路部の構成要素である抵抗(19と
、ダイオード0を並列接続し、かつ抵抗(1η凹を直列
接続して各々の一端なR及びQ端子と接続している。
To explain the drawing number, circuit configuration, and circuit operation of FIG. 1, (11 is a power supply terminal, (2) is a power supply line, (3) is a pulse generating means, (4) is a PNP type transistor, (
5) t61 is a differential circuit consisting of a capacitor (force and resistance (8), a capacitor (9) and a resistance (10), αυ
(12 (131&! diode, a Tsukuda!19uen is a resistor, 鞞 is an integrator circuit consisting of a resistor (11 and a capacitor), Cυ is a delay-type 7-linopflop as a pulse generation means, (2 bottles is a control unit, ) is a noise removal circuit as one circuit of an image processing circuit having line correlation, and connects the pulse generating means (3) and the transistor (4) pace via a resistor α4), and also connects its emitter to the power supply terminal ( 1) is connected to the power supply line (2), and the collector is grounded via the resistor a as its load, and the differential circuit (connected to the capacitor (power) which is a component of the clause, and the anode of the diode aυ is connected to the capacitor (7) and resistor (8) which are the constituent elements of the differential circuit, and its cathode is grounded through the resistor (161) and connected to the CL terminal of the flip-flop Qυ and the cathode of the diode az, Pulse generating means (3) and diode (
1′! A differential circuit is inserted between the anodes of J. Then, the D terminal of the flip-flop Q1) and the power supply line (2
), connect the Q and Q terminals to the input side of the control unit (22), connect the output side of the control unit (c) to the noise removal circuit (c), and connect the resistor ( 19 and a diode 0 are connected in parallel, and a resistor (1η concave) is connected in series and connected to R and Q terminals at one end of each.

まず磁気録画再生装置において電源端子(lIK第2図
(イ)K示す電源電圧vccを入力し、記録時はパルス
発生手段(3) Kより発生する第2図(ロ)に示す様
な切換パルス罠よって、複数個の回転磁気ヘッドを順次
切換えて磁気テープに映像信号を記録している。
First, in the magnetic recording/reproducing device, the power supply voltage vcc shown in Figure 2 (a) K is input to the power supply terminal (IK), and during recording, the switching pulse as shown in Figure 2 (b) is generated from the pulse generating means (3) K. Accordingly, a plurality of rotating magnetic heads are sequentially switched to record video signals on a magnetic tape.

次に再生時も同様にパルス発生手段(3)Kより第2図
(ロ)に示す切換パルスを発生し、複数個の回転磁気ヘ
ッドを順次切換えて磁気テープから映像信号を読み出し
ている。ここでこの切換パルスの立上りは微分回路IJ
6により微分され、ダイオードα2により微分波形の負
極性のパルスがカントされてCの波形は第2図に)に示
す波形となる。また切換パルスが立下がると抵抗04)
を介したトランジスタ(4)のベース電位が下がってト
ランジスタ(4)がオンし、そのコレクタの波形は切換
パルスを反転させたパルスとなり、即ち反転パルスの立
上りが微分回路f5) Icより微分され、ダイオード
Uυにより微分波形の負極性のパルスがカントされ、抵
抗(161により電位の下がったbの波形は第2図(ハ
)に示す波形となる。これより7リツプフロノプt2】
)のCL(クロック)端子に印加される波形は第2図(
ハ)に)の波形を合成した第2図(ホ)の波形となる。
Next, during reproduction, the switching pulse shown in FIG. 2(b) is similarly generated from the pulse generating means (3)K, and the plurality of rotating magnetic heads are sequentially switched to read the video signal from the magnetic tape. Here, the rising edge of this switching pulse is the differential circuit IJ.
6, and the negative polarity pulse of the differential waveform is canted by the diode α2, so that the waveform of C becomes the waveform shown in FIG. 2). Also, when the switching pulse falls, the resistance 04)
The base potential of the transistor (4) decreases through the transistor (4), turning on the transistor (4), and the waveform at its collector becomes a pulse that is an inversion of the switching pulse, that is, the rising edge of the inversion pulse is differentiated by the differentiator f5) Ic, The negative polarity pulse of the differential waveform is canted by the diode Uυ, and the waveform of b whose potential is lowered by the resistor (161) becomes the waveform shown in FIG.
The waveform applied to the CL (clock) terminal of ) is shown in Figure 2 (
The waveform of Fig. 2 (e) is obtained by combining the waveforms of (c) and (c).

フリップフロップQυのD(テーク)端子には第2図(
イ)K示す電源電圧Vccが印加されており、ここでC
L端子に第2図(ホ)に示すパルス電圧が印加されると
、Q端子からは立上がったハイレベルの電圧が出力され
ようとするが、Q端子から出力電圧が立上がると同時K
R端子には第2図(イ)K示す様にダイオード(13、
抵抗(17)及び積分回路Uにて定まる時定数に従って
徐々罠立上がるリセット用の電圧が印加され、破線に示
すスレッシュホールド電圧まで立上がるとQ端子からの
出力電圧はりセットされ、その後リセット用の電圧は時
定数に従って徐々に立下がってい(。即ちQ端子からは
前述の時定数にて定まるリセット用の電圧の立上り時間
をパルス幅とした立上がって立下がる所謂正極性のパル
ス電圧が出力され、またQ端子からはQ端子からの出力
電圧を反転させた立下がって立上がる所謂負極性のパル
ス電圧が出力される。
The D (take) terminal of the flip-flop Qυ is shown in Figure 2 (
b) A power supply voltage Vcc indicating K is applied, and here C
When the pulse voltage shown in Figure 2 (e) is applied to the L terminal, a rising high-level voltage is about to be output from the Q terminal, but at the same time when the output voltage rises from the Q terminal, K
A diode (13,
A reset voltage is applied that gradually rises according to the time constant determined by the resistor (17) and the integrating circuit U. When it rises to the threshold voltage shown by the broken line, the output voltage from the Q terminal is set, and then the reset voltage is applied. The voltage gradually falls according to the time constant (that is, the Q terminal outputs a so-called positive pulse voltage that rises and falls with the pulse width being the rise time of the reset voltage determined by the above-mentioned time constant). Also, from the Q terminal, a so-called negative polarity pulse voltage, which is an inversion of the output voltage from the Q terminal and which falls and rises, is output.

このQ或はQ端子のパルス電圧をパルス発生手段(3)
により発生する回転磁気へ7ドの切換パルスの立上り及
び立下り時に出力し、そして制御部(社)に入力し、そ
の制御出力により、ライン相関を有する雑音除去回路(
ハ)等が切換パルス幅内に含まれる垂直同期信号部を雑
音除去して垂直同期信号部を乱したりしない様にQ或゛
はQ端子から出力するパルス幅だけ雑音除去回路(ハ)
等の画像処理回路を不動作と成している。
Pulse generating means (3) generates a pulse voltage of this Q or Q terminal.
It is outputted at the rising and falling edges of the switching pulse of 7 to the rotating magnetism generated by the 7D switching pulse, and is inputted to the control section (company), and the control output causes a noise removal circuit (
In order to prevent noise removal from the vertical synchronization signal part included in the switching pulse width and disturbing the vertical synchronization signal part, Q or ゛ is a noise removal circuit corresponding to the pulse width output from the Q terminal (c).
The image processing circuits, etc., are rendered inactive.

また垂直同期信号部の一部期間のみ、雑音除去回路(ハ
)等を不動作と成す場合、垂直同期信号部のどの期間に
対し℃雑音除去回路(支))等を不動作と成すかによっ
てQ或はQ端子から出力するパルス電圧の出力タイミン
グ及びパルス幅を考慮しなければならない。そこで前者
のパルスの出力タイミングを可変する場合、パルス発生
手段(3)の後段に積分回路(図示せず)を設け、パル
ス発生手段(3)による切換パルスを積分する。この積
分波形の所定レベルをスレッシュホールド電位とするこ
とにより成形された切換パルスは、パルス発生手段(3
)による切換パルスの立上りから積分波形のスレッシュ
ホールド電位までの時間だけ遅延したパルスとなる。こ
れより7リツプフロツグC!!J)のCL端子へ供給さ
れるパルス電圧もこの時間だけ遅延したものとなってQ
及びQ端子から出力するパルス電圧の出力タイミングは
可変されたものとなる。
Also, if the noise removal circuit (c) etc. is made inactive only for a part of the period of the vertical synchronization signal section, it depends on which period of the vertical synchronization signal section the noise removal circuit (c) etc. is made inactive. The output timing and pulse width of the pulse voltage output from Q or the Q terminal must be considered. Therefore, when the output timing of the former pulse is varied, an integrating circuit (not shown) is provided after the pulse generating means (3) to integrate the switching pulses generated by the pulse generating means (3). A switching pulse formed by setting a predetermined level of this integral waveform as a threshold potential is generated by the pulse generating means (3
), the pulse is delayed by the time from the rise of the switching pulse to the threshold potential of the integral waveform. From this, 7 Lip Frog C! ! The pulse voltage supplied to the CL terminal of J) is also delayed by this time, and Q
And the output timing of the pulse voltage output from the Q terminal is varied.

また後者のパルス幅を可変する場合、垂直同期信号部の
全期間(垂直同期信号部前後の映像信号の一部を含んで
もよい)、雑音除去回路(ハ)等を不動作と成す場合も
含めて、ダイオード(131、抵抗(lη及び積分回路
部による時定数を可変し、第2図(イ)K示す波線のス
レッシュホールド電位までのリセット用の電圧の立上が
りを可変することにより、Q及びQ端子から出力される
パルス幅は可変される。
In addition, when the latter pulse width is varied, the entire period of the vertical synchronization signal section (which may include a part of the video signal before and after the vertical synchronization signal section), including the case where the noise removal circuit (c) etc. is inactive. Q and Q The pulse width output from the terminal is variable.

(へ)発明の効果 本発明の映1#信号処理方法によれば、回転磁気ヘッド
の切換パルスを利用し℃ライン相関を有する雑音除去回
路等の画像処理回路による垂直同期信号部の雑音除去を
禁止するパルスを作成することにより、新たな切換パル
ス用の発生手段を不要とし、かつ再生時にライン相関の
雑音除去回路等を使用しても再生時圧おける画質の乱れ
を防止し、文字多重放送を確実に再生することが可能等
の利点が得られる。
(f) Effects of the Invention According to the image 1# signal processing method of the present invention, noise removal in the vertical synchronization signal section is performed by an image processing circuit such as a noise removal circuit having a C line correlation using switching pulses of a rotating magnetic head. By creating a prohibited pulse, a new means of generating a switching pulse is not required, and even if a line-correlation noise removal circuit is used during playback, disturbances in image quality during playback can be prevented, and teletext broadcasting is prevented. This provides advantages such as being able to reliably reproduce the data.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の映像信号処理方法を実施する一実施回
路図、第2図は第1図の各点における波形図である。 主な図番の説明 (3)・・・パルス発生手段、(2+)・・・フリップ
フロップ、@・・・制御部、 (至)・・・雑音除去回
路。 出願人 三洋電機株式会社 外1名 代理人 弁理士 佐 野 静 夫
FIG. 1 is an implementation circuit diagram for implementing the video signal processing method of the present invention, and FIG. 2 is a waveform diagram at each point in FIG. 1. Explanation of main drawing numbers (3)... Pulse generation means, (2+)... Flip-flop, @... Control section, (To)... Noise removal circuit. Applicant Sanyo Electric Co., Ltd. and one other agent Patent attorney Shizuo Sano

Claims (1)

【特許請求の範囲】[Claims] (1)磁気録画再生装置において、映像信号を記録及び
再生する回転磁気ヘッドの切換用の切換パルスをパルス
発生手段により発生し、該切換パルスの立上り及び立下
り、或は前記切換パルスの立上り及び立下りよりも所定
時間遅延した位置からパルス作成手段により所定幅のパ
ルスを作成し、該所定幅のパルスを制御部へ入力し、前
記所定幅+7)パルスと同一幅かつ同一タイミングの制
御出力により前記映像信号における垂直同期信号部の全
期間或は一部期間のみライン相関関係を有する前記映像
信号用の画像処理回路を不動作と成すことを特徴とする
映像信号処理方法。
(1) In a magnetic recording and reproducing device, a pulse generating means generates a switching pulse for switching a rotating magnetic head for recording and reproducing video signals, and the rising and falling edges of the switching pulse, or the rising and falling edges of the switching pulse, A pulse with a predetermined width is created by a pulse creating means from a position delayed by a predetermined time from the falling edge, the pulse with the predetermined width is inputted to the control section, and the control output is performed with the same width and the same timing as the predetermined width + 7) pulse. A video signal processing method, characterized in that an image processing circuit for the video signal having a line correlation is made inactive during the entire period or only a part of the period of a vertical synchronization signal portion of the video signal.
JP59105350A 1984-05-24 1984-05-24 Video signal processing method Pending JPS60249487A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59105350A JPS60249487A (en) 1984-05-24 1984-05-24 Video signal processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59105350A JPS60249487A (en) 1984-05-24 1984-05-24 Video signal processing method

Publications (1)

Publication Number Publication Date
JPS60249487A true JPS60249487A (en) 1985-12-10

Family

ID=14405281

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59105350A Pending JPS60249487A (en) 1984-05-24 1984-05-24 Video signal processing method

Country Status (1)

Country Link
JP (1) JPS60249487A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5335512A (en) * 1976-09-13 1978-04-03 Sanyo Electric Co Ltd Drop-out compensating circuit
JPS5696581A (en) * 1979-12-29 1981-08-04 Sony Corp Generating circuit for vertical blanking signal and virtual vertical synchronizing signal

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5335512A (en) * 1976-09-13 1978-04-03 Sanyo Electric Co Ltd Drop-out compensating circuit
JPS5696581A (en) * 1979-12-29 1981-08-04 Sony Corp Generating circuit for vertical blanking signal and virtual vertical synchronizing signal

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