JPS5596766A - Noise reduction circuit in solid image pickup device - Google Patents

Noise reduction circuit in solid image pickup device

Info

Publication number
JPS5596766A
JPS5596766A JP290679A JP290679A JPS5596766A JP S5596766 A JPS5596766 A JP S5596766A JP 290679 A JP290679 A JP 290679A JP 290679 A JP290679 A JP 290679A JP S5596766 A JPS5596766 A JP S5596766A
Authority
JP
Japan
Prior art keywords
image pickup
solid image
picture elements
output
rom
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP290679A
Other languages
Japanese (ja)
Inventor
Shigenori Iwakuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP290679A priority Critical patent/JPS5596766A/en
Publication of JPS5596766A publication Critical patent/JPS5596766A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To correct a lack signal falsely by storing previously all picture elements of defective sensitivity on the surface of a solid image pickup element into a ROM and by utilizing these stored output signals.
CONSTITUTION: Before design of a solid image pickup device, solid image pickup element 1 is subjected to detection test previously for picture elements of defective sensitivity, whose outputs are zero or very small, output of picture elements of solid image pickup element 1, and coordinates indicating positions of these picture elements of defective sensitivity are stored in ROM 6. During the period when stored coordinates are read out from ROM 6 where the clock signal from clock signal generator 4 and horizontal and vertical synchronizing signals from synchronizing signal generation circuit 5 are supplied, the output sample hold pulse of circuit 7 holds the output signal of amplifier 8 in sample hold circuit 9.
COPYRIGHT: (C)1980,JPO&Japio
JP290679A 1979-01-17 1979-01-17 Noise reduction circuit in solid image pickup device Pending JPS5596766A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP290679A JPS5596766A (en) 1979-01-17 1979-01-17 Noise reduction circuit in solid image pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP290679A JPS5596766A (en) 1979-01-17 1979-01-17 Noise reduction circuit in solid image pickup device

Publications (1)

Publication Number Publication Date
JPS5596766A true JPS5596766A (en) 1980-07-23

Family

ID=11542393

Family Applications (1)

Application Number Title Priority Date Filing Date
JP290679A Pending JPS5596766A (en) 1979-01-17 1979-01-17 Noise reduction circuit in solid image pickup device

Country Status (1)

Country Link
JP (1) JPS5596766A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5945777A (en) * 1982-09-08 1984-03-14 Toshiba Corp Solid-state image pickup device
US4481539A (en) * 1981-03-10 1984-11-06 Rca Corporation Error correction arrangement for imagers

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4481539A (en) * 1981-03-10 1984-11-06 Rca Corporation Error correction arrangement for imagers
JPS5945777A (en) * 1982-09-08 1984-03-14 Toshiba Corp Solid-state image pickup device

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