JPS5596658A - Semiconductor container - Google Patents

Semiconductor container

Info

Publication number
JPS5596658A
JPS5596658A JP513279A JP513279A JPS5596658A JP S5596658 A JPS5596658 A JP S5596658A JP 513279 A JP513279 A JP 513279A JP 513279 A JP513279 A JP 513279A JP S5596658 A JPS5596658 A JP S5596658A
Authority
JP
Japan
Prior art keywords
chip
layer
container
positioning
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP513279A
Other languages
Japanese (ja)
Other versions
JPS6148780B2 (en
Inventor
Masato Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP513279A priority Critical patent/JPS5596658A/en
Publication of JPS5596658A publication Critical patent/JPS5596658A/en
Publication of JPS6148780B2 publication Critical patent/JPS6148780B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To accurately provide a chip carrying position in a semiconductor container by providing a positioning mark for carrying the chip while positioning a semiconductor chip at the terminal and the center in a container of laminated ceramic structure for containing the chip.
CONSTITUTION: Upper, middle and lower ceramic layers 12, 11, 10 are formed at a container for containing a semiconductor chip. A metallized layer is coated on the surface of the layer 10, and etched to thereby form a chip carrying pattern 15. Simultaneously, positioning mark 16 disposed at the center and standard positioning marks 17 disposed at four corners are provided by utilizing the other portion of the metallized layer. A metal pattern 13 connected to the electrode pads of the chip is extended through the external wall of the layer 10 to the bottom surface on the surface of the farme of the layer 11 having an opening. Then, the layer 12 having an opening is placed on the layer 11. After the chip is contained in the container, the container is coated with mask sheet, and the pattern 13 is connected to external lead terminal 14. In this construction, cut-off portion 18 is formed at the outer peripheral corner between the layers 12 and 11 to see the mark 16.
COPYRIGHT: (C)1980,JPO&Japio
JP513279A 1979-01-19 1979-01-19 Semiconductor container Granted JPS5596658A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP513279A JPS5596658A (en) 1979-01-19 1979-01-19 Semiconductor container

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP513279A JPS5596658A (en) 1979-01-19 1979-01-19 Semiconductor container

Publications (2)

Publication Number Publication Date
JPS5596658A true JPS5596658A (en) 1980-07-23
JPS6148780B2 JPS6148780B2 (en) 1986-10-25

Family

ID=11602777

Family Applications (1)

Application Number Title Priority Date Filing Date
JP513279A Granted JPS5596658A (en) 1979-01-19 1979-01-19 Semiconductor container

Country Status (1)

Country Link
JP (1) JPS5596658A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002289748A (en) * 2001-03-26 2002-10-04 Kyocera Corp Substrate for mounting electronic component

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53140049U (en) * 1977-04-13 1978-11-06

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53140049U (en) * 1977-04-13 1978-11-06

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002289748A (en) * 2001-03-26 2002-10-04 Kyocera Corp Substrate for mounting electronic component
JP4587587B2 (en) * 2001-03-26 2010-11-24 京セラ株式会社 Electronic component mounting board

Also Published As

Publication number Publication date
JPS6148780B2 (en) 1986-10-25

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