JPS5589999A - Memory damp start system - Google Patents

Memory damp start system

Info

Publication number
JPS5589999A
JPS5589999A JP16387978A JP16387978A JPS5589999A JP S5589999 A JPS5589999 A JP S5589999A JP 16387978 A JP16387978 A JP 16387978A JP 16387978 A JP16387978 A JP 16387978A JP S5589999 A JPS5589999 A JP S5589999A
Authority
JP
Japan
Prior art keywords
damp
register
gate
memory
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16387978A
Other languages
Japanese (ja)
Other versions
JPS603217B2 (en
Inventor
Takatsugu Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP53163879A priority Critical patent/JPS603217B2/en
Publication of JPS5589999A publication Critical patent/JPS5589999A/en
Publication of JPS603217B2 publication Critical patent/JPS603217B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To establish the damp start system in which RAM is not rewritten undesirably, by preventing the restriction from the key board task program at the memory damp start by the key input at the hardware circuit such as registers.
CONSTITUTION: The keyboard 3-2 and the microprocessor 5 are respectively provided with the hardware circuit consisting of the register 18, AND gate 19, damp start address hold register 14, address counter 15 and AND gate 16, and when the power supply is applied by closing the paper feed key 17 of the board 3-2, the output of the gate 19 is inverted and the address of PROM6 for keyboard task performing damp processing of the memory content of the register 14 is stored in the register 15. Further, in response to the program of ROM16 specified accessed with the register 15, RAM7 is rewritten, the processor is started without undesirable restriction of ROM, and damp-out with undesirable rewrite can be avoided.
COPYRIGHT: (C)1980,JPO&Japio
JP53163879A 1978-12-27 1978-12-27 Memory dump startup method Expired JPS603217B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53163879A JPS603217B2 (en) 1978-12-27 1978-12-27 Memory dump startup method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53163879A JPS603217B2 (en) 1978-12-27 1978-12-27 Memory dump startup method

Publications (2)

Publication Number Publication Date
JPS5589999A true JPS5589999A (en) 1980-07-08
JPS603217B2 JPS603217B2 (en) 1985-01-26

Family

ID=15782515

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53163879A Expired JPS603217B2 (en) 1978-12-27 1978-12-27 Memory dump startup method

Country Status (1)

Country Link
JP (1) JPS603217B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0196045U (en) * 1987-12-16 1989-06-26

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0441213Y2 (en) * 1987-03-20 1992-09-28

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0196045U (en) * 1987-12-16 1989-06-26
JPH0524997Y2 (en) * 1987-12-16 1993-06-24

Also Published As

Publication number Publication date
JPS603217B2 (en) 1985-01-26

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