JPS5452430A - Address switching unit - Google Patents

Address switching unit

Info

Publication number
JPS5452430A
JPS5452430A JP11888077A JP11888077A JPS5452430A JP S5452430 A JPS5452430 A JP S5452430A JP 11888077 A JP11888077 A JP 11888077A JP 11888077 A JP11888077 A JP 11888077A JP S5452430 A JPS5452430 A JP S5452430A
Authority
JP
Japan
Prior art keywords
register
address
unit
internal memory
external memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11888077A
Other languages
Japanese (ja)
Inventor
Toshinori Otsuka
Shinichi Morimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11888077A priority Critical patent/JPS5452430A/en
Publication of JPS5452430A publication Critical patent/JPS5452430A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication

Abstract

PURPOSE:To make it possible to make programs easily by attaining addressing by discriminating whether an address to be assigned is to an internal memory or to external memory judging from the content of the fixed one bit of an address register. CONSTITUTION:Onto semiconductor chip 11, CPU unit 12 and internal memory 13 used by unit by unit 12 are provided, and chip 11 is connected to external memory 16 used by unit 12. Address register 18 has an increment function over the entire register or a function of setting the whole register, and makes addressing by discriminating whether an address to be assigned is bound for internal memory 13 or external memory 16 judging from the content of at least one bit previously decided in register 18. Consequently, programs can be made easily by equally handling addresses to the external memory and internal memory.
JP11888077A 1977-10-03 1977-10-03 Address switching unit Pending JPS5452430A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11888077A JPS5452430A (en) 1977-10-03 1977-10-03 Address switching unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11888077A JPS5452430A (en) 1977-10-03 1977-10-03 Address switching unit

Publications (1)

Publication Number Publication Date
JPS5452430A true JPS5452430A (en) 1979-04-25

Family

ID=14747405

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11888077A Pending JPS5452430A (en) 1977-10-03 1977-10-03 Address switching unit

Country Status (1)

Country Link
JP (1) JPS5452430A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0256025A (en) * 1988-12-22 1990-02-26 Seiko Epson Corp One chip microcomputer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0256025A (en) * 1988-12-22 1990-02-26 Seiko Epson Corp One chip microcomputer
JPH0567969B2 (en) * 1988-12-22 1993-09-28 Seiko Epson Corp

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