JPS5589990A - Charge injection method for semiconductor memory - Google Patents
Charge injection method for semiconductor memoryInfo
- Publication number
- JPS5589990A JPS5589990A JP14694179A JP14694179A JPS5589990A JP S5589990 A JPS5589990 A JP S5589990A JP 14694179 A JP14694179 A JP 14694179A JP 14694179 A JP14694179 A JP 14694179A JP S5589990 A JPS5589990 A JP S5589990A
- Authority
- JP
- Japan
- Prior art keywords
- drain
- source
- floating gate
- voltage
- charge injection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000002347 injection Methods 0.000 title abstract 3
- 239000007924 injection Substances 0.000 title abstract 3
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 230000008018 melting Effects 0.000 abstract 2
- 238000002844 melting Methods 0.000 abstract 2
- 229910052751 metal Inorganic materials 0.000 abstract 2
- 239000002184 metal Substances 0.000 abstract 2
- 229910052814 silicon oxide Inorganic materials 0.000 abstract 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 abstract 1
- 230000015556 catabolic process Effects 0.000 abstract 1
- 230000000694 effects Effects 0.000 abstract 1
- 230000005684 electric field Effects 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 238000002955 isolation Methods 0.000 abstract 1
- 229910052750 molybdenum Inorganic materials 0.000 abstract 1
- 239000011733 molybdenum Substances 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
- H01L29/7884—Programmable transistors with only two possible levels of programmation charging by hot carrier injection
- H01L29/7886—Hot carrier produced by avalanche breakdown of a PN junction, e.g. FAMOS
Abstract
PURPOSE:To enable the injection of electrons with the power supply of low electric field, by constituting the floating gate with the metal of high melting point and high conductivity by taking the first insulation layer as specified thickness, grounding the gate electrode and applying a given voltage to the drain. CONSTITUTION:The silicon oxide layer 4 being the first isolation layer is made to the thickness of about 200Angstrom greater than the conductive region in which tunnel effect is dominant, and the floating gate 5 is made with the metal such as molybdenum greater in the high melting point and conductivity. In case of charge injection, the gate electrode 7 is grounded, the reverse voltage lower than the avalanche breakdown voltage of pn-junction between the source, drain and the substrate, i.e., -20V is fed to the source, drain 2, 3, to inject electrons to the floating gate 5 from the source, drain, 2, 3, via the silicon oxide film 4. Accordingly, to the peripheral circuit of memory cell, special consideration is not required for the dielectric voltage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14694179A JPS5589990A (en) | 1979-11-12 | 1979-11-12 | Charge injection method for semiconductor memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14694179A JPS5589990A (en) | 1979-11-12 | 1979-11-12 | Charge injection method for semiconductor memory |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5662073A Division JPS507440A (en) | 1973-05-18 | 1973-05-18 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5589990A true JPS5589990A (en) | 1980-07-08 |
| JPS5623238B2 JPS5623238B2 (en) | 1981-05-29 |
Family
ID=15419029
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14694179A Granted JPS5589990A (en) | 1979-11-12 | 1979-11-12 | Charge injection method for semiconductor memory |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5589990A (en) |
-
1979
- 1979-11-12 JP JP14694179A patent/JPS5589990A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5623238B2 (en) | 1981-05-29 |
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