JPS5578554A - Semiconductor - Google Patents

Semiconductor

Info

Publication number
JPS5578554A
JPS5578554A JP15207878A JP15207878A JPS5578554A JP S5578554 A JPS5578554 A JP S5578554A JP 15207878 A JP15207878 A JP 15207878A JP 15207878 A JP15207878 A JP 15207878A JP S5578554 A JPS5578554 A JP S5578554A
Authority
JP
Japan
Prior art keywords
polysilmethylene
emitter
coat
base
obtaining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15207878A
Other languages
Japanese (ja)
Other versions
JPS617028B2 (en
Inventor
Ryoichi Sudo
Takeshi Watanabe
Fusaji Shoji
Ataru Yokono
Tokio Isogai
Hiroshi Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15207878A priority Critical patent/JPS5578554A/en
Publication of JPS5578554A publication Critical patent/JPS5578554A/en
Publication of JPS617028B2 publication Critical patent/JPS617028B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Silicon Polymers (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE: To cross-link the resin on the surface of a semiconductor and in the vicinity thereof of with polysilmethylene or poly (silpolymethylene) for preventing the deterioration of element characteristics and the breakage due to the corrosion of lead wires.
CONSTITUTION: This invention is described in connection with one embodiment thereof herein. The mixture obtained by adding metallic Na to dimethyldichlorosilane is dehydrohalogenated for making decamethylcyclohexasilane. Decamethylcyclohexasilane is heated to 400°C in argon atmosphere for obtaining polysilmethylene with a molecular weight of 1,500. A base 2 and an emitter 3 are formed on an Si substrate 1 which serves as corrector also. A toluene solution of the polymer is applied to the surfaces of the base 2 and emitter 3 with a spinner, and the substrate 1 is kept at 100°C by heating for one hour, and the solution is evaporated for obtaining polymer coat 4. Next, the photo-resist layer 5 having the windows for forming the electrode take-out ports of the base 2 and emitter 3 is formed. Next, the electrode take-out ports are formed by etching the coat with toluene, the layer 5 is removed, and heat-treatment is made at 350°C for one hour for obtaining cross-lisnked polysilmethylene coat.
COPYRIGHT: (C)1980,JPO&Japio
JP15207878A 1978-12-11 1978-12-11 Semiconductor Granted JPS5578554A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15207878A JPS5578554A (en) 1978-12-11 1978-12-11 Semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15207878A JPS5578554A (en) 1978-12-11 1978-12-11 Semiconductor

Publications (2)

Publication Number Publication Date
JPS5578554A true JPS5578554A (en) 1980-06-13
JPS617028B2 JPS617028B2 (en) 1986-03-03

Family

ID=15532562

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15207878A Granted JPS5578554A (en) 1978-12-11 1978-12-11 Semiconductor

Country Status (1)

Country Link
JP (1) JPS5578554A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58200558A (en) * 1982-05-19 1983-11-22 Hitachi Ltd Semiconductor device
JPS59155152A (en) * 1983-02-24 1984-09-04 Seiko Epson Corp Resin-sealed semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58200558A (en) * 1982-05-19 1983-11-22 Hitachi Ltd Semiconductor device
JPS59155152A (en) * 1983-02-24 1984-09-04 Seiko Epson Corp Resin-sealed semiconductor device

Also Published As

Publication number Publication date
JPS617028B2 (en) 1986-03-03

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