JPS5578338A - Digital multiplication system - Google Patents

Digital multiplication system

Info

Publication number
JPS5578338A
JPS5578338A JP15199278A JP15199278A JPS5578338A JP S5578338 A JPS5578338 A JP S5578338A JP 15199278 A JP15199278 A JP 15199278A JP 15199278 A JP15199278 A JP 15199278A JP S5578338 A JPS5578338 A JP S5578338A
Authority
JP
Japan
Prior art keywords
register
data
multiplicand
multiplier
shifted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15199278A
Other languages
Japanese (ja)
Inventor
Shigeyuki Umigami
Kazuo Murano
Fumio Amano
Yasukazu Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15199278A priority Critical patent/JPS5578338A/en
Publication of JPS5578338A publication Critical patent/JPS5578338A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To shorten an operation processing time and achieve an accurate operation result by shifting multiplicand data to the most significant digit direction by the number of digits corresponding to the exponent of a multiplier data and multiplying shifted contents of a register and the real number of a multiplier register.
CONSTITUTION: Multiplicand register 10 stores multiplicand data, and register 11 is provided for detecting overflow of multiplicand register 10, and register 12 holds the polarity of the multiplicand, and register 13 stores multiplier data and data indicating a shift quantity. Here, multiplicand data led into register 10 is shifted to the most significant digit direction by the number of digits corresponding to the exponent of multiplier data, and shifted contents of register 10 and real number q of multiplier register 13 are multiplied. By this system, multiplication is performed in a small number of steps and the operation processing time can be shortened and an accurate operation result can be obtained when a multiplier over a maximum value expressed by limited word length data is multiplied.
COPYRIGHT: (C)1980,JPO&Japio
JP15199278A 1978-12-11 1978-12-11 Digital multiplication system Pending JPS5578338A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15199278A JPS5578338A (en) 1978-12-11 1978-12-11 Digital multiplication system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15199278A JPS5578338A (en) 1978-12-11 1978-12-11 Digital multiplication system

Publications (1)

Publication Number Publication Date
JPS5578338A true JPS5578338A (en) 1980-06-12

Family

ID=15530685

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15199278A Pending JPS5578338A (en) 1978-12-11 1978-12-11 Digital multiplication system

Country Status (1)

Country Link
JP (1) JPS5578338A (en)

Similar Documents

Publication Publication Date Title
KR830008239A (en) Data processor performing decimal multiplication using ROM
JPS54117646A (en) Computer
JPS5330241A (en) Arithmetic unit
JPS5578338A (en) Digital multiplication system
JPS5438199A (en) Calculation board
JPS5720842A (en) Overflow detecting system
JPS5424558A (en) Portable electronic unit with clock function
JPS5624645A (en) Decimal multiplication system
JPS55164942A (en) Division circuit
JPS54104249A (en) Trigonometric function computer
JPS54112661A (en) Process measuring apparatus
JPS54132144A (en) Multiple process system
JPS5635256A (en) Electronic desk computer
JPS53124035A (en) Exponent display system
JPS55157037A (en) Processing system for multiplication and division
JPS5569850A (en) Decimal multiplication system
JPS553066A (en) Composite multiplier
JPS55110343A (en) Arithmetic circuit
JPS5572250A (en) Decimal arithmetic circuit
JPS556670A (en) Multiplication processor
JPS5455139A (en) Bcd subtracter
JPS542025A (en) Zero suppression system of electronic unit having digital display unit
JPS54134534A (en) Pulse count method
JPS54162431A (en) Arithmetic control unit
JPS5421772A (en) Electronic fare balance