JPS5563841A - Manufacture of semiconductor integrated circuit - Google Patents

Manufacture of semiconductor integrated circuit

Info

Publication number
JPS5563841A
JPS5563841A JP13751378A JP13751378A JPS5563841A JP S5563841 A JPS5563841 A JP S5563841A JP 13751378 A JP13751378 A JP 13751378A JP 13751378 A JP13751378 A JP 13751378A JP S5563841 A JPS5563841 A JP S5563841A
Authority
JP
Japan
Prior art keywords
film
oxide film
single crystal
layer
porous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13751378A
Other languages
Japanese (ja)
Inventor
Shunichi Kai
Masaharu Aoyama
Toshio Yonezawa
Masakatsu Kojima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13751378A priority Critical patent/JPS5563841A/en
Publication of JPS5563841A publication Critical patent/JPS5563841A/en
Pending legal-status Critical Current

Links

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  • Element Separation (AREA)

Abstract

PURPOSE: To fabricate a highly reliable IC at low cost by selectively providing anodic oxidation and epitaxial growth on a p-type single crystal Si subatrate and performing element-to-element separation.
CONSTITUTION: An element mounting region 4 is selectively designated through the etching for a p-type single crystal Si 1. An n+-layer 5 is formed on the exposed surface by diffusing Sb and the resulting surface is covered with an oxide film 6. The oxide film 6 after an acid-resistant insulation film 3 and the oxide film 2 have been removed is used to selectively anordize the substrate 1, and then a porous Si- layer is formed on the surface region encompassing the exposed region 4 and a porous Si oxide film 8 is formed by thermal oxidation. After removal of the oxide layer 6, an epitaxial film with desired resistivity and thickness is grown. After simultaneously forming a single crystal Si film 10 and a poly crystal Si film 9, only the film 9 is removed, and then an element D is formed on a single crystal Si film 10 by means of conventional planer method. Like these, with the porous Si oxide film 8 utilized as separation layer, highly reliable ICs can be manufactured at cheaper production cost without resort to diffusion treatment extending over a long period at high temperatures.
COPYRIGHT: (C)1980,JPO&Japio
JP13751378A 1978-11-08 1978-11-08 Manufacture of semiconductor integrated circuit Pending JPS5563841A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13751378A JPS5563841A (en) 1978-11-08 1978-11-08 Manufacture of semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13751378A JPS5563841A (en) 1978-11-08 1978-11-08 Manufacture of semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS5563841A true JPS5563841A (en) 1980-05-14

Family

ID=15200417

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13751378A Pending JPS5563841A (en) 1978-11-08 1978-11-08 Manufacture of semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS5563841A (en)

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