JPS5552587A - Static semiconductor memory circuit - Google Patents
Static semiconductor memory circuitInfo
- Publication number
- JPS5552587A JPS5552587A JP12261778A JP12261778A JPS5552587A JP S5552587 A JPS5552587 A JP S5552587A JP 12261778 A JP12261778 A JP 12261778A JP 12261778 A JP12261778 A JP 12261778A JP S5552587 A JPS5552587 A JP S5552587A
- Authority
- JP
- Japan
- Prior art keywords
- write
- circuit
- power switches
- timing
- timing signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Abstract
PURPOSE:To shorten write time by controlling power switches of a write control circuit and address buffer circuit at nearly-equal timing. CONSTITUTION:By timing signal PS3 from timing signal generating circuit 10, power switches such as write control signal buffer circuit 6, Y and X address buffer circuits 1a and 1b, and 3a and 3b are controlled at nearyl-equal timing and power switches of Y and X address decoders 2 and 4 connected to memory matrix 5 are controlled by slow timing signal PS5 generated by circuit 10. Therefore, when a fixed memory cell is selected by circuits 2 and 4, write operation by previously- determined write data starts immediately. As a result, write cycles are shorten and write time can be made short.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12261778A JPS5552587A (en) | 1978-10-06 | 1978-10-06 | Static semiconductor memory circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12261778A JPS5552587A (en) | 1978-10-06 | 1978-10-06 | Static semiconductor memory circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5552587A true JPS5552587A (en) | 1980-04-17 |
JPS615231B2 JPS615231B2 (en) | 1986-02-17 |
Family
ID=14840380
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12261778A Granted JPS5552587A (en) | 1978-10-06 | 1978-10-06 | Static semiconductor memory circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5552587A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5870481A (en) * | 1981-10-23 | 1983-04-26 | Oki Electric Ind Co Ltd | Semiconductor storing circuit |
JPS59124091A (en) * | 1982-12-29 | 1984-07-18 | Fujitsu Ltd | Semiconductor memory |
JPS63291290A (en) * | 1987-05-22 | 1988-11-29 | Nec Corp | Chip enable circuit |
JPH07201181A (en) * | 1994-11-29 | 1995-08-04 | Hitachi Ltd | Semiconductor memory device |
JPH07201180A (en) * | 1994-11-29 | 1995-08-04 | Hitachi Ltd | Semiconductor memory device |
-
1978
- 1978-10-06 JP JP12261778A patent/JPS5552587A/en active Granted
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5870481A (en) * | 1981-10-23 | 1983-04-26 | Oki Electric Ind Co Ltd | Semiconductor storing circuit |
JPS59124091A (en) * | 1982-12-29 | 1984-07-18 | Fujitsu Ltd | Semiconductor memory |
JPH047038B2 (en) * | 1982-12-29 | 1992-02-07 | Fujitsu Ltd | |
JPS63291290A (en) * | 1987-05-22 | 1988-11-29 | Nec Corp | Chip enable circuit |
JPH07201181A (en) * | 1994-11-29 | 1995-08-04 | Hitachi Ltd | Semiconductor memory device |
JPH07201180A (en) * | 1994-11-29 | 1995-08-04 | Hitachi Ltd | Semiconductor memory device |
Also Published As
Publication number | Publication date |
---|---|
JPS615231B2 (en) | 1986-02-17 |
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