JPS5552581A - Pattern generator - Google Patents

Pattern generator

Info

Publication number
JPS5552581A
JPS5552581A JP12491078A JP12491078A JPS5552581A JP S5552581 A JPS5552581 A JP S5552581A JP 12491078 A JP12491078 A JP 12491078A JP 12491078 A JP12491078 A JP 12491078A JP S5552581 A JPS5552581 A JP S5552581A
Authority
JP
Japan
Prior art keywords
registers
fixed
6aw6c
address
addresses
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12491078A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5752679B2 (enExample
Inventor
Hiromi Maruyama
Takashi Tokuno
Masao Shimizu
Koji Ishikawa
Naoaki Narumi
Osamu Oguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
NTT Inc
Original Assignee
Advantest Corp
Nippon Telegraph and Telephone Corp
Takeda Riken Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp, Nippon Telegraph and Telephone Corp, Takeda Riken Industries Co Ltd filed Critical Advantest Corp
Priority to JP12491078A priority Critical patent/JPS5552581A/ja
Priority to US06/083,527 priority patent/US4300234A/en
Publication of JPS5552581A publication Critical patent/JPS5552581A/ja
Publication of JPS5752679B2 publication Critical patent/JPS5752679B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/31813—Test pattern generators

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP12491078A 1978-10-11 1978-10-11 Pattern generator Granted JPS5552581A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP12491078A JPS5552581A (en) 1978-10-11 1978-10-11 Pattern generator
US06/083,527 US4300234A (en) 1978-10-11 1979-10-10 Address pattern generator for testing a memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12491078A JPS5552581A (en) 1978-10-11 1978-10-11 Pattern generator

Publications (2)

Publication Number Publication Date
JPS5552581A true JPS5552581A (en) 1980-04-17
JPS5752679B2 JPS5752679B2 (enExample) 1982-11-09

Family

ID=14897130

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12491078A Granted JPS5552581A (en) 1978-10-11 1978-10-11 Pattern generator

Country Status (2)

Country Link
US (1) US4300234A (enExample)
JP (1) JPS5552581A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58208981A (ja) * 1982-05-28 1983-12-05 Nec Corp アドレス制御回路

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5914840B2 (ja) * 1979-10-19 1984-04-06 日本電信電話株式会社 半導体メモリ試験用パタ−ン発生装置
US4414665A (en) * 1979-11-21 1983-11-08 Nippon Telegraph & Telephone Public Corp. Semiconductor memory device test apparatus
US4370746A (en) * 1980-12-24 1983-01-25 International Business Machines Corporation Memory address selector
US4751636A (en) * 1981-03-09 1988-06-14 General Signal Corp. Memory management method and apparatus for initializing and/or clearing R/W storage areas
US4442519A (en) * 1982-03-05 1984-04-10 International Business Machines Corporation Memory address sequence generator
US4751631A (en) * 1983-02-04 1988-06-14 Signal Processing Systems, Inc. Apparatus for fast generation of signal sequences
US4532628A (en) * 1983-02-28 1985-07-30 The Perkin-Elmer Corporation System for periodically reading all memory locations to detect errors
US4559626A (en) * 1983-04-05 1985-12-17 Brown Carleston O Portable minicomputer for testing memories
US4567593A (en) * 1983-10-06 1986-01-28 Honeywell Information Systems Inc. Apparatus for verification of a signal transfer in a preselected path in a data processing system
JPS62140299A (ja) * 1985-12-13 1987-06-23 Advantest Corp パタ−ン発生装置
CA1259680A (en) * 1986-05-06 1989-09-19 Mosaid Technologies Inc. Digital signal scrambler
JPS62288587A (ja) * 1986-06-06 1987-12-15 Nec Corp 信号良否判定器
US5101409A (en) * 1989-10-06 1992-03-31 International Business Machines Corporation Checkboard memory self-test
JP2882426B2 (ja) * 1991-03-29 1999-04-12 株式会社アドバンテスト アドレス発生装置
JPH05281299A (ja) * 1992-03-31 1993-10-29 Ando Electric Co Ltd アドレスパターン発生器
JP3233068B2 (ja) * 1997-05-23 2001-11-26 安藤電気株式会社 パターン発生装置
US6078637A (en) * 1998-06-29 2000-06-20 Cypress Semiconductor Corp. Address counter test mode for memory device
JP4462692B2 (ja) * 1999-03-01 2010-05-12 株式会社アドバンテスト 半導体デバイス
US6571365B1 (en) * 1999-11-03 2003-05-27 Unisys Corporation Initial stage of a multi-stage algorithmic pattern generator for testing IC chips
US6539508B1 (en) 2000-03-15 2003-03-25 Xilinx, Inc. Methods and circuits for testing programmable logic
DE10223167B4 (de) * 2002-05-24 2015-11-05 Infineon Technologies Ag Verfahren und Vorrichtung zum Testen von Speichereinheiten in einer digitalen Schaltung
JP4408881B2 (ja) * 2006-09-27 2010-02-03 Ｎｅｃエレクトロニクス株式会社 半導体集積回路
CN114637638B (zh) * 2022-05-18 2022-08-05 南京宏泰半导体科技有限公司 一种模板化的存储器测试图形发生器及方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3751649A (en) * 1971-05-17 1973-08-07 Marcrodata Co Memory system exerciser
JPS5329417B2 (enExample) * 1973-02-26 1978-08-21
FR2246023B1 (enExample) * 1973-09-05 1976-10-01 Honeywell Bull Soc Ind
US3961251A (en) * 1974-12-20 1976-06-01 International Business Machines Corporation Testing embedded arrays
NL7416755A (nl) * 1974-12-23 1976-06-25 Philips Nv Werkwijze en inrichting voor het testen van een digitaal geheugen.
US4055754A (en) * 1975-12-22 1977-10-25 Chesley Gilman D Memory device and method of testing the same
US4079453A (en) * 1976-08-20 1978-03-14 Honeywell Information Systems Inc. Method and apparatus to test address formulation in an advanced computer system
US4195770A (en) * 1978-10-24 1980-04-01 Burroughs Corporation Test generator for random access memories

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58208981A (ja) * 1982-05-28 1983-12-05 Nec Corp アドレス制御回路

Also Published As

Publication number Publication date
JPS5752679B2 (enExample) 1982-11-09
US4300234A (en) 1981-11-10

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