JPS553650A - Semiconductor device production - Google Patents
Semiconductor device productionInfo
- Publication number
- JPS553650A JPS553650A JP7561078A JP7561078A JPS553650A JP S553650 A JPS553650 A JP S553650A JP 7561078 A JP7561078 A JP 7561078A JP 7561078 A JP7561078 A JP 7561078A JP S553650 A JPS553650 A JP S553650A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- oxide layer
- substrate
- gate
- gate electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
Abstract
PURPOSE:To enhance withstand voltage between the second gate electrode and the substrate in a semiconductor device, a thick, low-temperature oxidized layer is formed near the boundary of the first and second gate oxide film, thereby preventing the formation of extremely thin layer at the second gate oxide layer boundary. CONSTITUTION:A semiconductor substrate 11 is deposited with an oxide layer 17 and a first electrode material layer 18, and a selected portion of which is deposited with a mask 19' of Si oxide or Si nitride layer. Side etching is applied to the layer 18 so as to leave an extended edge 20 of layer 19', forming a first gate electrode 18'. The gate electrode 18' is used as mask to etch the layer 17, to form a first gate oxide layer 17'. Vapor phase growing process is used to coat a low temperature oxide layer 21 to fill sufficiently a space 22 enclosed by the extrusion 20 and the substrate 11. Entire surface etching is applied to the layer 21 to leave only the layer 22' between the substrate 11 and the extruded edge 20. An oxide layer 23 and second electrode material are coated and, by selective etching, a second gate electrode 24 and a second gate oxide layer 23' are sequently formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7561078A JPS553650A (en) | 1978-06-22 | 1978-06-22 | Semiconductor device production |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7561078A JPS553650A (en) | 1978-06-22 | 1978-06-22 | Semiconductor device production |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS553650A true JPS553650A (en) | 1980-01-11 |
Family
ID=13581142
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7561078A Pending JPS553650A (en) | 1978-06-22 | 1978-06-22 | Semiconductor device production |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS553650A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63123032U (en) * | 1987-02-05 | 1988-08-10 |
-
1978
- 1978-06-22 JP JP7561078A patent/JPS553650A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63123032U (en) * | 1987-02-05 | 1988-08-10 |
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