JPS5530830A - Method of forming pattern in semiconductor device - Google Patents
Method of forming pattern in semiconductor deviceInfo
- Publication number
- JPS5530830A JPS5530830A JP10356078A JP10356078A JPS5530830A JP S5530830 A JPS5530830 A JP S5530830A JP 10356078 A JP10356078 A JP 10356078A JP 10356078 A JP10356078 A JP 10356078A JP S5530830 A JPS5530830 A JP S5530830A
- Authority
- JP
- Japan
- Prior art keywords
- accurate
- film
- window
- resist
- resist film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
PURPOSE: To prevent pinholes and make the patterning of resist films of different exposure conditions accurate and easy by forming double photoresist films of different opening dimensions.
CONSTITUTION: When opening electrode contact point windows on the thin part 2A of, for example, SiO2 insulating film 2 and the thick part 2C of it where there is a polysilicon electrode wiring 10 on a semiconductor substrate 1, a photoresist film 3A and a photoresist film 3B are formed being overlapped. To the resist film 3A, an accurate window 4 is made on the part 2A, but on the part 2C, a window larger than required is made. On the other hand, to the resist film 3B, an accurate window 7 is made on the part 2C, but on the part 2A, a window larger than required is made. The exposure conditions of the resist films are different on the two parts, but accurate windows are formed on the part 2A by the resist film 3A and on the part 2B by the resist film 3B, therefore, accuracy is improved.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10356078A JPS5530830A (en) | 1978-08-25 | 1978-08-25 | Method of forming pattern in semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10356078A JPS5530830A (en) | 1978-08-25 | 1978-08-25 | Method of forming pattern in semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5530830A true JPS5530830A (en) | 1980-03-04 |
Family
ID=14357189
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10356078A Pending JPS5530830A (en) | 1978-08-25 | 1978-08-25 | Method of forming pattern in semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5530830A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55101948A (en) * | 1979-01-31 | 1980-08-04 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Photoetching method |
| CN106298643A (en) * | 2016-08-29 | 2017-01-04 | 京东方科技集团股份有限公司 | The manufacture method of a kind of via and the manufacture method of display base plate |
-
1978
- 1978-08-25 JP JP10356078A patent/JPS5530830A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55101948A (en) * | 1979-01-31 | 1980-08-04 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Photoetching method |
| CN106298643A (en) * | 2016-08-29 | 2017-01-04 | 京东方科技集团股份有限公司 | The manufacture method of a kind of via and the manufacture method of display base plate |
| CN106298643B (en) * | 2016-08-29 | 2019-04-05 | 京东方科技集团股份有限公司 | A kind of production method of the production method and display base plate of via hole |
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