JPS553052A - Control system for data file device - Google Patents

Control system for data file device

Info

Publication number
JPS553052A
JPS553052A JP7535278A JP7535278A JPS553052A JP S553052 A JPS553052 A JP S553052A JP 7535278 A JP7535278 A JP 7535278A JP 7535278 A JP7535278 A JP 7535278A JP S553052 A JPS553052 A JP S553052A
Authority
JP
Japan
Prior art keywords
retrial
cpu8
error
control system
data file
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7535278A
Other languages
Japanese (ja)
Inventor
Hiroaki Nakanishi
Hiroshi Kuwabara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7535278A priority Critical patent/JPS553052A/en
Publication of JPS553052A publication Critical patent/JPS553052A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To secure an effective recovery action for the control system of the data file device by starting the retrial for the SHN (Service Request Not Honoured) error from the address right before occurrence of the error.
CONSTITUTION: In case a delay is produced at the writing action to the main memory of CPU8 while the data of magnetic drum 101 is read out and then transferred to CPU8 via buffer memoty 301, memory 301 has an overflow. At this moment, detection mechanism 311 operates to inform the overflow to control circuit 302. Thus circuit 302 transmits signal 404 to switch on interruption signal line 406 and then informs the end of the error to CPU8. The proper sector address of the retrial is held in retrial register 310 when mechanism 311 has operation. And based on the contents of the sector address, the retrial is given automatically.
COPYRIGHT: (C)1980,JPO&Japio
JP7535278A 1978-06-23 1978-06-23 Control system for data file device Pending JPS553052A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7535278A JPS553052A (en) 1978-06-23 1978-06-23 Control system for data file device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7535278A JPS553052A (en) 1978-06-23 1978-06-23 Control system for data file device

Publications (1)

Publication Number Publication Date
JPS553052A true JPS553052A (en) 1980-01-10

Family

ID=13573752

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7535278A Pending JPS553052A (en) 1978-06-23 1978-06-23 Control system for data file device

Country Status (1)

Country Link
JP (1) JPS553052A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59109963A (en) * 1982-12-15 1984-06-25 Hitachi Ltd System for controlling writing of information
JPS6215097A (en) * 1985-07-09 1987-01-23 旭化成株式会社 Rapping boring device and method
JPH0366431A (en) * 1990-07-20 1991-03-22 Amada Co Ltd Method for carrying away product in punch press

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59109963A (en) * 1982-12-15 1984-06-25 Hitachi Ltd System for controlling writing of information
JPH0576056B2 (en) * 1982-12-15 1993-10-21 Hitachi Ltd
JPS6215097A (en) * 1985-07-09 1987-01-23 旭化成株式会社 Rapping boring device and method
JPH0366431A (en) * 1990-07-20 1991-03-22 Amada Co Ltd Method for carrying away product in punch press

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