JPS553043A - Microcomputer control circuit - Google Patents
Microcomputer control circuitInfo
- Publication number
- JPS553043A JPS553043A JP7508678A JP7508678A JPS553043A JP S553043 A JPS553043 A JP S553043A JP 7508678 A JP7508678 A JP 7508678A JP 7508678 A JP7508678 A JP 7508678A JP S553043 A JPS553043 A JP S553043A
- Authority
- JP
- Japan
- Prior art keywords
- order
- circuit
- acc9
- alu8
- kept
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Executing Machine-Instructions (AREA)
Abstract
PURPOSE: To save the program memory by executing only the first order when the same order continues as well as accepting the interruption even at the order execution time.
CONSTITUTION: With the first load immediate (Li) order, the Li order is decoded through order decoder 4 and the lower 4 bits of order code A of IR3 are applied to ACC9 via bus 6 and ALU8. On the other hand, for store signal D of ACC9, Li order signal B becomes H with the Li order and the output of delay circuit 14 is kept at L. Accordingly, AND circuit 16 features H and the data of ALU8 supplied to ACC9 is kept to be stored as it is. Then with the Li order, the output of circuit 14 also becomes H with circuit 16 turned to L. Thus the storage of the data is inhibited for ACC9. If an interruption takes place at that moment, the signals of circuit 14 are also shunted to stack 5.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7508678A JPS553043A (en) | 1978-06-20 | 1978-06-20 | Microcomputer control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7508678A JPS553043A (en) | 1978-06-20 | 1978-06-20 | Microcomputer control circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS553043A true JPS553043A (en) | 1980-01-10 |
JPS5732818B2 JPS5732818B2 (en) | 1982-07-13 |
Family
ID=13566005
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7508678A Granted JPS553043A (en) | 1978-06-20 | 1978-06-20 | Microcomputer control circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS553043A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55105752A (en) * | 1979-02-07 | 1980-08-13 | Nec Corp | Information processor |
JPS5736348A (en) * | 1980-08-14 | 1982-02-27 | Toshiba Corp | Branched controlling circuit |
-
1978
- 1978-06-20 JP JP7508678A patent/JPS553043A/en active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55105752A (en) * | 1979-02-07 | 1980-08-13 | Nec Corp | Information processor |
JPS6329293B2 (en) * | 1979-02-07 | 1988-06-13 | Nippon Electric Co | |
JPS5736348A (en) * | 1980-08-14 | 1982-02-27 | Toshiba Corp | Branched controlling circuit |
JPS6032207B2 (en) * | 1980-08-14 | 1985-07-26 | 株式会社東芝 | Branch control circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS5732818B2 (en) | 1982-07-13 |
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