JPS5528105A - Interruption processing system - Google Patents

Interruption processing system

Info

Publication number
JPS5528105A
JPS5528105A JP9894078A JP9894078A JPS5528105A JP S5528105 A JPS5528105 A JP S5528105A JP 9894078 A JP9894078 A JP 9894078A JP 9894078 A JP9894078 A JP 9894078A JP S5528105 A JPS5528105 A JP S5528105A
Authority
JP
Japan
Prior art keywords
signal
interruption
gate
isf
outputted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9894078A
Other languages
Japanese (ja)
Inventor
Yukio Kiuchi
Haruo Wakabayashi
Takashi Tojiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP9894078A priority Critical patent/JPS5528105A/en
Publication of JPS5528105A publication Critical patent/JPS5528105A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To simplify the interruption display circuit of double buffer type of the central processing unit, by providing the circuit enabling to deliver the interruption signal by sufficiently longer timing than the instruction execution time of the central processing unit at the data channel unit.
CONSTITUTION: The input terminal 6 of the interruption display FF(ISF)2 having the set gate 4 is connected to the delivery end 102 of the interruption signal delivery circuit of the data channel unit (DCH), and other input terminal is connected to the write-in gate 3 from the internal bus of the central processing unit (CC). When DCH sets the interruption request FF(IRQF) 101 to 1 with the output of the decoder 105, the interruption request signal is outputted by one machine cycle, and when the IRQF 101 is continuously operated by n times, the interruption request signal is outputted in the timing of n-th signal of the machine cycle. When the interruption request signal is outputted longer than the execution time T1 of instruction, after ISF 2 is 1, since signal 1 is given to the terminal 6, even if signal 0 is given to the gate 4 of CC with the gate 3, ISF 2 keeps the state of 1.
COPYRIGHT: (C)1980,JPO&Japio
JP9894078A 1978-08-14 1978-08-14 Interruption processing system Pending JPS5528105A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9894078A JPS5528105A (en) 1978-08-14 1978-08-14 Interruption processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9894078A JPS5528105A (en) 1978-08-14 1978-08-14 Interruption processing system

Publications (1)

Publication Number Publication Date
JPS5528105A true JPS5528105A (en) 1980-02-28

Family

ID=14233106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9894078A Pending JPS5528105A (en) 1978-08-14 1978-08-14 Interruption processing system

Country Status (1)

Country Link
JP (1) JPS5528105A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61249143A (en) * 1985-04-26 1986-11-06 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Interruption circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS502347A (en) * 1973-05-14 1975-01-10
JPS5023747A (en) * 1973-07-02 1975-03-14

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS502347A (en) * 1973-05-14 1975-01-10
JPS5023747A (en) * 1973-07-02 1975-03-14

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61249143A (en) * 1985-04-26 1986-11-06 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Interruption circuit

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