JPS55159264A - Computer processing system - Google Patents
Computer processing systemInfo
- Publication number
- JPS55159264A JPS55159264A JP6635579A JP6635579A JPS55159264A JP S55159264 A JPS55159264 A JP S55159264A JP 6635579 A JP6635579 A JP 6635579A JP 6635579 A JP6635579 A JP 6635579A JP S55159264 A JPS55159264 A JP S55159264A
- Authority
- JP
- Japan
- Prior art keywords
- signal data
- program
- programs
- main
- stored
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Multi Processors (AREA)
Abstract
PURPOSE: To reduce the execution time of specific program, by executing the program of the same form of blocks of a plurality continuously without waiting time parallelly.
CONSTITUTION: When the logic circuit which can be split into four phases P1WP4 is present, level sorting is made by the main processor 3, and the logical equation programs L1WL4 belonging to each phase, input signal data and output signal data A and B, B and C, C and D, D and E are modified as shown in Figure. Next, after the main processing unit 3 reads out the logical equation programs L1WL4, input signal data AWD and output signal data BWE stored in the main memory unit 2 are read out, and each program is independently executed at the four working processors 4W7. After the end of execution, the output signals BWE only are stored in the main memory unit 2 again with the main processing unit 3.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6635579A JPS55159264A (en) | 1979-05-28 | 1979-05-28 | Computer processing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6635579A JPS55159264A (en) | 1979-05-28 | 1979-05-28 | Computer processing system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55159264A true JPS55159264A (en) | 1980-12-11 |
Family
ID=13313454
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6635579A Pending JPS55159264A (en) | 1979-05-28 | 1979-05-28 | Computer processing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55159264A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5998255A (en) * | 1982-07-14 | 1984-06-06 | ヒュンダイ・エレクトロニクス・インダストリーズ・カンパニー・リミテッド | Digital computer for executing several sets of instructions in simultaneously interleaved form |
-
1979
- 1979-05-28 JP JP6635579A patent/JPS55159264A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5998255A (en) * | 1982-07-14 | 1984-06-06 | ヒュンダイ・エレクトロニクス・インダストリーズ・カンパニー・リミテッド | Digital computer for executing several sets of instructions in simultaneously interleaved form |
JPH0441378B2 (en) * | 1982-07-14 | 1992-07-08 | Unisys Corp |
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