JPS55115151A - Duplex system - Google Patents
Duplex systemInfo
- Publication number
- JPS55115151A JPS55115151A JP2056679A JP2056679A JPS55115151A JP S55115151 A JPS55115151 A JP S55115151A JP 2056679 A JP2056679 A JP 2056679A JP 2056679 A JP2056679 A JP 2056679A JP S55115151 A JPS55115151 A JP S55115151A
- Authority
- JP
- Japan
- Prior art keywords
- existing
- control unit
- spare
- existing system
- cpu1
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE: To increase the processing ability of system, by reducing the required time through simultaneous operation of the discs in existence and spare system, by one operation instruction from the existing system CPU to the disc control unit of existing system.
CONSTITUTION: The duplex system is constituted with the CPU1 of existing system and CPU1' of spare system, disc control unit 2 of existing system, disc control unit 2' of spare system, magnetic disc memory unit 7 of existing system and magnetic disc memory unit 7' of spare system, and the respective control units 2, 2' are provided with the interface circuit section 3, operation control section 4, and control circuits 5, 6 of existing and spare system. Further, one operation insturction from CPU1 of existing system to the control unit 2 of existing system is analyzed with the control unit 2 and the system is constituted so that the write-in of instruction to the memory units 7, 7' via the control circuits 5, 6 and the readout of instruction from the memory units 7, 7' can be made, allowing to increase the processing ability of system.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54020566A JPS5931743B2 (en) | 1979-02-23 | 1979-02-23 | Duplex system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54020566A JPS5931743B2 (en) | 1979-02-23 | 1979-02-23 | Duplex system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55115151A true JPS55115151A (en) | 1980-09-04 |
JPS5931743B2 JPS5931743B2 (en) | 1984-08-03 |
Family
ID=12030719
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54020566A Expired JPS5931743B2 (en) | 1979-02-23 | 1979-02-23 | Duplex system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5931743B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57108797U (en) * | 1980-12-25 | 1982-07-05 | ||
JPS57109021A (en) * | 1980-12-26 | 1982-07-07 | Fujitsu Ltd | Input and output control system |
JPH0854987A (en) * | 1994-08-10 | 1996-02-27 | Nec Corp | Mirror disk device |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63157134U (en) * | 1987-03-31 | 1988-10-14 |
-
1979
- 1979-02-23 JP JP54020566A patent/JPS5931743B2/en not_active Expired
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57108797U (en) * | 1980-12-25 | 1982-07-05 | ||
JPS57109021A (en) * | 1980-12-26 | 1982-07-07 | Fujitsu Ltd | Input and output control system |
JPH0854987A (en) * | 1994-08-10 | 1996-02-27 | Nec Corp | Mirror disk device |
Also Published As
Publication number | Publication date |
---|---|
JPS5931743B2 (en) | 1984-08-03 |
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