JPS5616981A - Data retrieval unit - Google Patents

Data retrieval unit

Info

Publication number
JPS5616981A
JPS5616981A JP9021479A JP9021479A JPS5616981A JP S5616981 A JPS5616981 A JP S5616981A JP 9021479 A JP9021479 A JP 9021479A JP 9021479 A JP9021479 A JP 9021479A JP S5616981 A JPS5616981 A JP S5616981A
Authority
JP
Japan
Prior art keywords
signal
address
execution
program
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9021479A
Other languages
Japanese (ja)
Other versions
JPS6161142B2 (en
Inventor
Hideo Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9021479A priority Critical patent/JPS5616981A/en
Publication of JPS5616981A publication Critical patent/JPS5616981A/en
Publication of JPS6161142B2 publication Critical patent/JPS6161142B2/ja
Granted legal-status Critical Current

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  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To shorten the instructing execution time and to increase the performance of the unit, by using the effective address for the retrieval of the high speed buffer memory and performing the calculation of this retrieval and the real memory address parallelly.
CONSTITUTION: The directory control 17 clears the high speed buffer memory 19, at the transition from the control program to the user's program and reverse. At the execution of the user's program, the signal S1 from the address register 11 and the signal S2 from the modification register 12 are added 13 to obtain the execution address signal S3. The signal S3 and the signal S4 from the base address regiter 14 are added 15 to obtain the real memory address signal S5. In parallel with the execution of calculation of the signal S5, the signal S3 is compared 18 with the signal S6 from the directory 16 to obtain the signal S2. The data S9 can be read out from the memory 19 with the coincidence output of the signal S8.
COPYRIGHT: (C)1981,JPO&Japio
JP9021479A 1979-07-16 1979-07-16 Data retrieval unit Granted JPS5616981A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9021479A JPS5616981A (en) 1979-07-16 1979-07-16 Data retrieval unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9021479A JPS5616981A (en) 1979-07-16 1979-07-16 Data retrieval unit

Publications (2)

Publication Number Publication Date
JPS5616981A true JPS5616981A (en) 1981-02-18
JPS6161142B2 JPS6161142B2 (en) 1986-12-24

Family

ID=13992224

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9021479A Granted JPS5616981A (en) 1979-07-16 1979-07-16 Data retrieval unit

Country Status (1)

Country Link
JP (1) JPS5616981A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5887943A (en) * 1981-11-20 1983-05-25 Hitachi Ltd Loop transmission controlling system

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04152044A (en) * 1990-10-09 1992-05-26 Hamai Sangyo Kk Pallet exchanger for machine tool

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5887943A (en) * 1981-11-20 1983-05-25 Hitachi Ltd Loop transmission controlling system

Also Published As

Publication number Publication date
JPS6161142B2 (en) 1986-12-24

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