JPS55150189A - Memory circuit - Google Patents

Memory circuit

Info

Publication number
JPS55150189A
JPS55150189A JP5725079A JP5725079A JPS55150189A JP S55150189 A JPS55150189 A JP S55150189A JP 5725079 A JP5725079 A JP 5725079A JP 5725079 A JP5725079 A JP 5725079A JP S55150189 A JPS55150189 A JP S55150189A
Authority
JP
Japan
Prior art keywords
channel
word line
level
resetting
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5725079A
Other languages
English (en)
Other versions
JPS631678B2 (ja
Inventor
Yasuo Akatsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5725079A priority Critical patent/JPS55150189A/ja
Priority to US06/147,786 priority patent/US4338678A/en
Priority to DE8080102590T priority patent/DE3065755D1/de
Priority to EP80102590A priority patent/EP0019241B1/en
Publication of JPS55150189A publication Critical patent/JPS55150189A/ja
Publication of JPS631678B2 publication Critical patent/JPS631678B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/418—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
JP5725079A 1979-05-10 1979-05-10 Memory circuit Granted JPS55150189A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP5725079A JPS55150189A (en) 1979-05-10 1979-05-10 Memory circuit
US06/147,786 US4338678A (en) 1979-05-10 1980-05-08 Memory device
DE8080102590T DE3065755D1 (en) 1979-05-10 1980-05-09 Word line selection in a semi-conductor memory device
EP80102590A EP0019241B1 (en) 1979-05-10 1980-05-09 Word line selection in a semi-conductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5725079A JPS55150189A (en) 1979-05-10 1979-05-10 Memory circuit

Publications (2)

Publication Number Publication Date
JPS55150189A true JPS55150189A (en) 1980-11-21
JPS631678B2 JPS631678B2 (ja) 1988-01-13

Family

ID=13050273

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5725079A Granted JPS55150189A (en) 1979-05-10 1979-05-10 Memory circuit

Country Status (4)

Country Link
US (1) US4338678A (ja)
EP (1) EP0019241B1 (ja)
JP (1) JPS55150189A (ja)
DE (1) DE3065755D1 (ja)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5819791A (ja) * 1981-07-27 1983-02-04 Seiko Epson Corp 半導体記憶装置
JPS61237292A (ja) * 1985-04-15 1986-10-22 Hitachi Micro Comput Eng Ltd 半導体記憶装置
JPS6318591A (ja) * 1986-07-10 1988-01-26 Nec Corp アドレス回路
JP2009277341A (ja) * 2008-05-14 2009-11-26 Taiwan Semiconductor Manufacturing Co Ltd Ｓｒａｍセルの書き込みマージンを改善する書き込みアシスト回路
JP2010529581A (ja) * 2007-05-31 2010-08-26 マーベル ワールド トレード リミテッド ワード線バッファ付きメモリ構造
JP2017054570A (ja) * 2015-09-11 2017-03-16 ルネサスエレクトロニクス株式会社 半導体装置
JP2018092694A (ja) * 2016-12-01 2018-06-14 ルネサスエレクトロニクス株式会社 半導体装置

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5619585A (en) * 1979-07-26 1981-02-24 Toshiba Corp Semiconductor memory unit
JPS5819794A (ja) * 1981-07-29 1983-02-04 Fujitsu Ltd 半導体メモリ
JPS59115615A (ja) * 1982-12-22 1984-07-04 Fujitsu Ltd 半導体回路
US4553043A (en) * 1983-03-28 1985-11-12 Codex Corporation High speed drive circuit
JPS6010492A (ja) * 1983-06-29 1985-01-19 Fujitsu Ltd 半導体記憶装置
JPH0194592A (ja) * 1987-10-06 1989-04-13 Fujitsu Ltd 半導体メモリ
EP0552941B1 (en) * 1992-01-21 1998-07-08 STMicroelectronics, Inc. Signal line pulse enhancing circuit for integrated circuits
JP3862346B2 (ja) * 1997-03-13 2006-12-27 富士通株式会社 駆動回路及びそれを利用した半導体記憶装置
US6034913A (en) * 1997-09-19 2000-03-07 Siemens Microelectronics, Inc. Apparatus and method for high-speed wordline driving with low area overhead
DE19952258A1 (de) 1999-10-29 2001-05-10 Infineon Technologies Ag Integrierter Speicher
DE10037976C2 (de) * 2000-08-03 2003-01-30 Infineon Technologies Ag Anordnung zum verlustarmen Schreiben eines MRAMs
DE10050770A1 (de) * 2000-10-13 2002-05-02 Infineon Technologies Ag Schaltungsanordnung zum Steuern der Wortleitungen einer Speichermatrix
DE10116327B4 (de) 2001-04-02 2010-02-18 Qimonda Ag Schaltungsanordnung zum Steuern der Wortleitungen einer Speichermatrix
CN109264499A (zh) * 2018-10-19 2019-01-25 苏州宸浩纺织科技有限公司 一种用于纺织机械的过线装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50118634A (ja) * 1974-03-01 1975-09-17
JPS51147224A (en) * 1975-06-13 1976-12-17 Hitachi Ltd Semiconductor memory
JPS52155928A (en) * 1976-06-21 1977-12-24 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device
JPS53984A (en) * 1976-06-25 1978-01-07 Agency Of Ind Science & Technol Integrated circuit element

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3786437A (en) * 1972-01-03 1974-01-15 Honeywell Inf Systems Random access memory system utilizing an inverting cell concept
US3778784A (en) * 1972-02-14 1973-12-11 Intel Corp Memory system incorporating a memory cell and timing means on a single semiconductor substrate
US3962686A (en) * 1972-05-16 1976-06-08 Nippon Electric Company Limited Memory circuit
US3810124A (en) * 1972-06-30 1974-05-07 Ibm Memory accessing system
US3803562A (en) * 1972-11-21 1974-04-09 Honeywell Inf Systems Semiconductor mass memory
US3946369A (en) * 1975-04-21 1976-03-23 Intel Corporation High speed MOS RAM employing depletion loads
JPS51163830U (ja) * 1975-06-20 1976-12-27
DE2760086C2 (ja) * 1976-07-26 1988-02-18 Hitachi, Ltd., Tokio/Tokyo, Jp
US4110842A (en) * 1976-11-15 1978-08-29 Advanced Micro Devices, Inc. Random access memory with memory status for improved access and cycle times
JPS5925381B2 (ja) * 1977-12-30 1984-06-16 富士通株式会社 半導体集積回路装置
JPS5567993A (en) * 1978-11-14 1980-05-22 Fujitsu Ltd Semiconductor memory unit
US4207616A (en) * 1978-11-29 1980-06-10 Teletype Corporation Logic array having improved speed characteristics

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50118634A (ja) * 1974-03-01 1975-09-17
JPS51147224A (en) * 1975-06-13 1976-12-17 Hitachi Ltd Semiconductor memory
JPS52155928A (en) * 1976-06-21 1977-12-24 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device
JPS53984A (en) * 1976-06-25 1978-01-07 Agency Of Ind Science & Technol Integrated circuit element

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0253880B2 (ja) * 1981-07-27 1990-11-20 Seiko Epson Corp
JPS5819791A (ja) * 1981-07-27 1983-02-04 Seiko Epson Corp 半導体記憶装置
JPS61237292A (ja) * 1985-04-15 1986-10-22 Hitachi Micro Comput Eng Ltd 半導体記憶装置
US4719603A (en) * 1985-04-15 1988-01-12 Hitachi, Ltd. Semiconductor memory having a dynamic level detecting means for detecting a level of a word line
JPH0565960B2 (ja) * 1985-04-15 1993-09-20 Hitachi Microcumputer Eng
JPS6318591A (ja) * 1986-07-10 1988-01-26 Nec Corp アドレス回路
KR101446726B1 (ko) * 2007-05-31 2014-10-06 마벨 월드 트레이드 리미티드 워드 라인 버퍼를 갖는 메모리 구조
JP2010529581A (ja) * 2007-05-31 2010-08-26 マーベル ワールド トレード リミテッド ワード線バッファ付きメモリ構造
JP2009277341A (ja) * 2008-05-14 2009-11-26 Taiwan Semiconductor Manufacturing Co Ltd Ｓｒａｍセルの書き込みマージンを改善する書き込みアシスト回路
JP2017054570A (ja) * 2015-09-11 2017-03-16 ルネサスエレクトロニクス株式会社 半導体装置
US10255970B2 (en) 2015-09-11 2019-04-09 Renesas Electronics Corporation Semiconductor device
US10354722B2 (en) 2015-09-11 2019-07-16 Renesas Electronics Corporation Semiconductor device
JP2018092694A (ja) * 2016-12-01 2018-06-14 ルネサスエレクトロニクス株式会社 半導体装置

Also Published As

Publication number Publication date
US4338678A (en) 1982-07-06
EP0019241B1 (en) 1983-11-30
JPS631678B2 (ja) 1988-01-13
EP0019241A1 (en) 1980-11-26
DE3065755D1 (en) 1984-01-05

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