JPS5513942A - Manufacturing method of semiconductor light receiving element - Google Patents

Manufacturing method of semiconductor light receiving element

Info

Publication number
JPS5513942A
JPS5513942A JP8695478A JP8695478A JPS5513942A JP S5513942 A JPS5513942 A JP S5513942A JP 8695478 A JP8695478 A JP 8695478A JP 8695478 A JP8695478 A JP 8695478A JP S5513942 A JPS5513942 A JP S5513942A
Authority
JP
Japan
Prior art keywords
mask
region
epi
layer
sio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8695478A
Other languages
Japanese (ja)
Other versions
JPS5537111B2 (en
Inventor
Nobuhiko Susa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP8695478A priority Critical patent/JPS5513942A/en
Publication of JPS5513942A publication Critical patent/JPS5513942A/en
Publication of JPS5537111B2 publication Critical patent/JPS5537111B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Light Receiving Elements (AREA)

Abstract

PURPOSE: To establish a diffusion processing in one time by forming a thick mask in the central portion and a thin mask in the circumferential portion on the epi- layer grown on the semiconductor substrate and by diffusing and forming a deep region in the epi-layer under a window provided at the both ends of the central portion and a shallow region associated with the epi-layer under the central portion.
CONSTITUTION: A N-type layer 3 is epi-grown on the P+-type semiconductor substrate 1 to form a PN junction 2 and a mask 31 having a predetermined figure, made of SiO2 and others is provided on the layer 3. Successively, a mask 33 made of SiO2 is covered over the full surface, an annular window 32 is given to the both sides of the mask 31, a deep N+-type region 5 is diffused and formed under the window 32 by selecting the density of impurity and diffusion time, and at the same time is formed a shallow N+-type region 6 connected to the region 5 under the mask 31. Thereafter, the masks 33 and 31 are completely removed, a light passing protective film 8 of SiO2 is covered over the full surface, an electrode 9 is attached to the end of the region 6 and an electrode 10 is provided on the back face of the substrate 1.
COPYRIGHT: (C)1980,JPO&Japio
JP8695478A 1978-07-17 1978-07-17 Manufacturing method of semiconductor light receiving element Granted JPS5513942A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8695478A JPS5513942A (en) 1978-07-17 1978-07-17 Manufacturing method of semiconductor light receiving element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8695478A JPS5513942A (en) 1978-07-17 1978-07-17 Manufacturing method of semiconductor light receiving element

Publications (2)

Publication Number Publication Date
JPS5513942A true JPS5513942A (en) 1980-01-31
JPS5537111B2 JPS5537111B2 (en) 1980-09-25

Family

ID=13901256

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8695478A Granted JPS5513942A (en) 1978-07-17 1978-07-17 Manufacturing method of semiconductor light receiving element

Country Status (1)

Country Link
JP (1) JPS5513942A (en)

Also Published As

Publication number Publication date
JPS5537111B2 (en) 1980-09-25

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