JPS55138865A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS55138865A
JPS55138865A JP4684779A JP4684779A JPS55138865A JP S55138865 A JPS55138865 A JP S55138865A JP 4684779 A JP4684779 A JP 4684779A JP 4684779 A JP4684779 A JP 4684779A JP S55138865 A JPS55138865 A JP S55138865A
Authority
JP
Japan
Prior art keywords
transistors
mirror surface
array
axis
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4684779A
Other languages
Japanese (ja)
Other versions
JPH0116016B2 (en
Inventor
Soichi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4684779A priority Critical patent/JPS55138865A/en
Publication of JPS55138865A publication Critical patent/JPS55138865A/en
Publication of JPH0116016B2 publication Critical patent/JPH0116016B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

PURPOSE:To improve the availability of a plurality of transistors of symmetrical mirror surface structure that base terminals are separated at the farthest distance by symmetrically arraying the transistors with respect to axial direction of the mirror surface as a transistor array and disposing the array perpendiculary to the symmetrical axis of the mirror surface. CONSTITUTION:Transistors are so disposed symmetrically with respect to the mirror surface axis 109 that the base terminals 103 and 104 thereof are located at the farthest distance from each other, this transistors array is as a minimum unit of repeated dispositions in a chip. A transistor cell 110 thus formed is repeatedly disposed in the direction of a symmetrical mirror surface axis 109 as a transistor array 111. The array 111 thus formed is repeatedly disposed as designated by 113, 114 at an interval required with each other in a direction 112 perpendicular to the axis 109. Thus, an LSI is largely integrated so that, the larger the LSI is arrayed, the number of the space transistors at the transistor array end becomes substantially constant in mean value and one space transistor is created only in case that the circuit block using odd transistors is aligned in a direction of odd arrays.
JP4684779A 1979-04-17 1979-04-17 Semiconductor device Granted JPS55138865A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4684779A JPS55138865A (en) 1979-04-17 1979-04-17 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4684779A JPS55138865A (en) 1979-04-17 1979-04-17 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS55138865A true JPS55138865A (en) 1980-10-30
JPH0116016B2 JPH0116016B2 (en) 1989-03-22

Family

ID=12758722

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4684779A Granted JPS55138865A (en) 1979-04-17 1979-04-17 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS55138865A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1669832A1 (en) * 2004-12-03 2006-06-14 Dialog Semiconductor GmbH An accurate high current circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5441088A (en) * 1977-09-06 1979-03-31 Ibm Ic

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5441088A (en) * 1977-09-06 1979-03-31 Ibm Ic

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1669832A1 (en) * 2004-12-03 2006-06-14 Dialog Semiconductor GmbH An accurate high current circuit
US7091892B2 (en) 2004-12-03 2006-08-15 Dialog Semiconductor Gmbh Method for implementation of a low noise, high accuracy current mirror for audio applications

Also Published As

Publication number Publication date
JPH0116016B2 (en) 1989-03-22

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