JPS55133110A - Integrated circuit device - Google Patents

Integrated circuit device

Info

Publication number
JPS55133110A
JPS55133110A JP4071079A JP4071079A JPS55133110A JP S55133110 A JPS55133110 A JP S55133110A JP 4071079 A JP4071079 A JP 4071079A JP 4071079 A JP4071079 A JP 4071079A JP S55133110 A JPS55133110 A JP S55133110A
Authority
JP
Japan
Prior art keywords
bias
voltage
circuit
amplifier
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4071079A
Other languages
Japanese (ja)
Inventor
Tatsuo Numata
Koji Ishida
Tadashi Noguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP4071079A priority Critical patent/JPS55133110A/en
Publication of JPS55133110A publication Critical patent/JPS55133110A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H03F1/305—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in case of switching on or off of a power supply

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To establish the integrated circuit for audio amplifier without pop noise, by constituting the resistor for bias supply and generation with polycrystal semiconductor layer. CONSTITUTION:The input signal IN drives the load such as speaker via the differential amplifier 2 consisting of TRSQ1, Q2 taking the current Miller circuit consisting of transistors TRQ3, Q4 as load and the power amplifying stage 3 consisting of TRSQ5-Q8. The differential amplifier 2 has the constant current source consisting of TRSQ9-Q11 controlled with the known muting signal applying switch SW and it is biased to the voltage VR with the bias circuit 1 consisting of TRSQ12, Q13. The resistors R13, R14 of the bias circuit 1 and the feedback resistors R1, R2 of amplifier are not of base diffusion resistance construction but formed with polycrystal semiconductor layer, e.g., polysilicon layer. As a result, after power supply OFF, the bias voltage is not lowered in following the power supply voltage, causing no pop noise at the output.
JP4071079A 1979-04-04 1979-04-04 Integrated circuit device Pending JPS55133110A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4071079A JPS55133110A (en) 1979-04-04 1979-04-04 Integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4071079A JPS55133110A (en) 1979-04-04 1979-04-04 Integrated circuit device

Publications (1)

Publication Number Publication Date
JPS55133110A true JPS55133110A (en) 1980-10-16

Family

ID=12588128

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4071079A Pending JPS55133110A (en) 1979-04-04 1979-04-04 Integrated circuit device

Country Status (1)

Country Link
JP (1) JPS55133110A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55156405A (en) * 1979-05-25 1980-12-05 Hitachi Ltd Acoustic amplifying output circuit
JPS56156005A (en) * 1980-05-02 1981-12-02 Rohm Co Ltd Electric power amplifier
JPS57121305A (en) * 1981-01-20 1982-07-28 Matsushita Electric Ind Co Ltd Muting circuit
JPS57143711U (en) * 1981-03-02 1982-09-09
JPS5980006A (en) * 1982-10-29 1984-05-09 Sanyo Electric Co Ltd Amplifying circuit
US4918400A (en) * 1988-04-20 1990-04-17 Sanyo Electric Co., Ltd. Amplifier circuit
US5625323A (en) * 1995-02-15 1997-04-29 Fujitsu Limited FET gate bias circuit
CN108370237A (en) * 2015-12-21 2018-08-03 德州仪器公司 Mitigate amplifier Pi puff noises

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55156405A (en) * 1979-05-25 1980-12-05 Hitachi Ltd Acoustic amplifying output circuit
JPS56156005A (en) * 1980-05-02 1981-12-02 Rohm Co Ltd Electric power amplifier
JPS6332284B2 (en) * 1980-05-02 1988-06-29 Rohm Kk
JPS57121305A (en) * 1981-01-20 1982-07-28 Matsushita Electric Ind Co Ltd Muting circuit
JPH0345566B2 (en) * 1981-01-20 1991-07-11 Matsushita Electric Ind Co Ltd
JPS57143711U (en) * 1981-03-02 1982-09-09
JPH0230902Y2 (en) * 1981-03-02 1990-08-21
JPS5980006A (en) * 1982-10-29 1984-05-09 Sanyo Electric Co Ltd Amplifying circuit
US4918400A (en) * 1988-04-20 1990-04-17 Sanyo Electric Co., Ltd. Amplifier circuit
US5625323A (en) * 1995-02-15 1997-04-29 Fujitsu Limited FET gate bias circuit
CN108370237A (en) * 2015-12-21 2018-08-03 德州仪器公司 Mitigate amplifier Pi puff noises
CN108370237B (en) * 2015-12-21 2022-05-06 德州仪器公司 Reducing amplifier pop noise

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