JPS55127070A - Electrically erasable and reprogrammable permanent memory cell - Google Patents

Electrically erasable and reprogrammable permanent memory cell

Info

Publication number
JPS55127070A
JPS55127070A JP3256380A JP3256380A JPS55127070A JP S55127070 A JPS55127070 A JP S55127070A JP 3256380 A JP3256380 A JP 3256380A JP 3256380 A JP3256380 A JP 3256380A JP S55127070 A JPS55127070 A JP S55127070A
Authority
JP
Japan
Prior art keywords
memory cell
electrically erasable
permanent memory
reprogrammable permanent
reprogrammable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3256380A
Other languages
English (en)
Japanese (ja)
Inventor
Jierube Berunaaru
Fuerurasu Jiyan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Centre Electronique Horloger SA
Original Assignee
Centre Electronique Horloger SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Centre Electronique Horloger SA filed Critical Centre Electronique Horloger SA
Publication of JPS55127070A publication Critical patent/JPS55127070A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/683—Floating-gate IGFETs having only two programming levels programmed by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/684—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/686—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection using hot carriers produced by avalanche breakdown of PN junctions, e.g. floating gate avalanche injection MOS [FAMOS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
JP3256380A 1979-03-14 1980-03-14 Electrically erasable and reprogrammable permanent memory cell Pending JPS55127070A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH240479A CH631287A5 (fr) 1979-03-14 1979-03-14 Element de memoire non-volatile, electriquement reprogrammable.

Publications (1)

Publication Number Publication Date
JPS55127070A true JPS55127070A (en) 1980-10-01

Family

ID=4232993

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3256380A Pending JPS55127070A (en) 1979-03-14 1980-03-14 Electrically erasable and reprogrammable permanent memory cell

Country Status (4)

Country Link
US (1) US4532535A (en, 2012)
JP (1) JPS55127070A (en, 2012)
CH (1) CH631287A5 (en, 2012)
DE (1) DE3009719A1 (en, 2012)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1985001146A1 (en) * 1983-08-29 1985-03-14 Seeq Technology, Inc. Mos floating gate memory cell and process for fabricating same
JPS63503270A (ja) * 1986-05-13 1988-11-24 ラティス・セミコンダクター・コーポレイション システム内にてプログラム可能の論理装置

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58130571A (ja) * 1982-01-29 1983-08-04 Hitachi Ltd 半導体装置
JPS59155968A (ja) * 1983-02-25 1984-09-05 Toshiba Corp 半導体記憶装置
US4701776A (en) * 1983-08-29 1987-10-20 Seeq Technology, Inc. MOS floating gate memory cell and process for fabricating same
US4822750A (en) * 1983-08-29 1989-04-18 Seeq Technology, Inc. MOS floating gate memory cell containing tunneling diffusion region in contact with drain and extending under edges of field oxide
NL8402023A (nl) * 1984-06-27 1986-01-16 Philips Nv Halfgeleiderinrichting met een niet-vluchtige geheugentransistor.
US4616245A (en) * 1984-10-29 1986-10-07 Ncr Corporation Direct-write silicon nitride EEPROM cell
JPS61105862A (ja) * 1984-10-30 1986-05-23 Toshiba Corp 半導体装置
JPS61136274A (ja) * 1984-12-07 1986-06-24 Toshiba Corp 半導体装置
US4597060A (en) * 1985-05-01 1986-06-24 Texas Instruments Incorporated EPROM array and method for fabricating
US4939558A (en) * 1985-09-27 1990-07-03 Texas Instruments Incorporated EEPROM memory cell and driving circuitry
US4742492A (en) * 1985-09-27 1988-05-03 Texas Instruments Incorporated EEPROM memory cell having improved breakdown characteristics and driving circuitry therefor
IT1201834B (it) * 1986-07-10 1989-02-02 Sgs Microelettronica Spa Dispositivo di memoria non volatile a semiconduttore
US5223731A (en) * 1988-06-30 1993-06-29 Goldstar Electron Co., Ltd. EPROM cell using trench isolation to provide leak current immunity
JP2529885B2 (ja) * 1989-03-10 1996-09-04 工業技術院長 半導体メモリ及びその動作方法
US5077691A (en) * 1989-10-23 1991-12-31 Advanced Micro Devices, Inc. Flash EEPROM array with negative gate voltage erase operation
US5199001A (en) * 1990-10-29 1993-03-30 Intel Corporation Architecture for erasing very small areas of flash EPROMs
EP0757352B1 (en) * 1995-08-04 2001-03-28 STMicroelectronics S.r.l. Threshold detecting device
US5841165A (en) * 1995-11-21 1998-11-24 Programmable Microelectronics Corporation PMOS flash EEPROM cell with single poly
US5736764A (en) * 1995-11-21 1998-04-07 Programmable Microelectronics Corporation PMOS flash EEPROM cell with single poly
EP0904588B1 (en) * 1996-06-14 2001-07-25 Infineon Technologies AG A device and method for multi-level charge/storage and reading out
US7425940B2 (en) * 2004-02-09 2008-09-16 Advanced Lcd Technologies Development Center Co., Ltd. Liquid crystal pixel memory, liquid crystal display, and methods of driving the same
CN102593064B (zh) * 2012-03-11 2014-01-22 复旦大学 一种栅控二极管半导体存储器器件的制造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS519689A (en, 2012) * 1974-07-15 1976-01-26 Tokyo Shibaura Electric Co
JPS5143083A (en, 2012) * 1974-10-09 1976-04-13 Nippon Electric Co
JPS5294002A (en) * 1976-02-02 1977-08-08 Nec Corp Integrated circuit
JPS5389379A (en) * 1977-01-17 1978-08-05 Sanyo Electric Co Ltd Memory element

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3843954A (en) * 1972-12-29 1974-10-22 Ibm High-voltage integrated driver circuit and memory embodying same
US3919711A (en) * 1973-02-26 1975-11-11 Intel Corp Erasable floating gate device
DE2643987C2 (de) * 1974-09-20 1984-03-29 Siemens AG, 1000 Berlin und 8000 München n-Kanal-Speicher-FET
US4087795A (en) * 1974-09-20 1978-05-02 Siemens Aktiengesellschaft Memory field effect storage device
US4148044A (en) * 1976-09-29 1979-04-03 Siemens Aktiengesellschaft N-channel memory field effect transistor
CH621917B (fr) * 1977-06-27 Centre Electron Horloger Dispositif integre de commande.
US4099196A (en) * 1977-06-29 1978-07-04 Intel Corporation Triple layer polysilicon cell
US4257056A (en) * 1979-06-27 1981-03-17 National Semiconductor Corporation Electrically erasable read only memory

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS519689A (en, 2012) * 1974-07-15 1976-01-26 Tokyo Shibaura Electric Co
JPS5143083A (en, 2012) * 1974-10-09 1976-04-13 Nippon Electric Co
JPS5294002A (en) * 1976-02-02 1977-08-08 Nec Corp Integrated circuit
JPS5389379A (en) * 1977-01-17 1978-08-05 Sanyo Electric Co Ltd Memory element

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1985001146A1 (en) * 1983-08-29 1985-03-14 Seeq Technology, Inc. Mos floating gate memory cell and process for fabricating same
JPS63503270A (ja) * 1986-05-13 1988-11-24 ラティス・セミコンダクター・コーポレイション システム内にてプログラム可能の論理装置

Also Published As

Publication number Publication date
CH631287A5 (fr) 1982-07-30
DE3009719C2 (en, 2012) 1990-05-10
DE3009719A1 (de) 1980-09-25
US4532535A (en) 1985-07-30

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