JPS55125751A - Data transmission circuit - Google Patents

Data transmission circuit

Info

Publication number
JPS55125751A
JPS55125751A JP3373079A JP3373079A JPS55125751A JP S55125751 A JPS55125751 A JP S55125751A JP 3373079 A JP3373079 A JP 3373079A JP 3373079 A JP3373079 A JP 3373079A JP S55125751 A JPS55125751 A JP S55125751A
Authority
JP
Japan
Prior art keywords
memory
register
output
address
separated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3373079A
Other languages
Japanese (ja)
Inventor
Tateo Kamiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3373079A priority Critical patent/JPS55125751A/en
Publication of JPS55125751A publication Critical patent/JPS55125751A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/20—Modulator circuits; Transmitter circuits
    • H04L27/2032—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner
    • H04L27/2092—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner with digital generation of the modulated carrier (does not include the modulation of a digitally generated carrier)

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To enable to reduce the memory capacity remarkably, by selecting the address separately two or more times from the register storing the DC data and adding the number of times separated after accessing the memory. CONSTITUTION:The selection circuit 5' and the addition circuit 6' are provided. The phase information output for N time slot's share of the register 1' is selected 5' with number of times of l and fed as the address of the memory 2' and the clock developed 3' is given to the memory 2' as the address and the sample value corresponding to the phase information from the memory 2' is picked up. Further, the addition 6' of m times (where m=l-1) is made and it is converted 4' into analog signal and picked up. Accordingly, when l=2 or 4, the output of the register 1' is separated into 2-4 times to access the memory 2' and the output of the memory 2' is added by once to three times. Further, the output of the register 1' is separated into l times to access the memory, allowing to reduce the number of memories with 1/l of the memory address buses than usual and with 1/2Xl of the required memory.
JP3373079A 1979-03-22 1979-03-22 Data transmission circuit Pending JPS55125751A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3373079A JPS55125751A (en) 1979-03-22 1979-03-22 Data transmission circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3373079A JPS55125751A (en) 1979-03-22 1979-03-22 Data transmission circuit

Publications (1)

Publication Number Publication Date
JPS55125751A true JPS55125751A (en) 1980-09-27

Family

ID=12394509

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3373079A Pending JPS55125751A (en) 1979-03-22 1979-03-22 Data transmission circuit

Country Status (1)

Country Link
JP (1) JPS55125751A (en)

Similar Documents

Publication Publication Date Title
JPS5652454A (en) Input/output control method of variable word length memory
JPS5332633A (en) Information processing unit
JPS5622172A (en) Retrieving device for picture information
JPS55125751A (en) Data transmission circuit
JPS55149084A (en) Clock apparatus
JPS5474632A (en) Data processor
JPS5443630A (en) Memory access control system
JPS5466727A (en) Access control system for buffer memory
JPS5440535A (en) Interface circuit for microcomputer
JPS5733472A (en) Memory access control system
JPS5475938A (en) Data processor of multiplex artificial memory system
JPS54540A (en) Computer composite system
GB2099264B (en) Speech synthesis system with parameter look-up table
JPS55101177A (en) Memory unit
JPS55118170A (en) Memory access device
JPS5587363A (en) Buffer memory control system
JPS542711A (en) Electronic musical instrument
JPS5599652A (en) Microprogram control unit
JPS55134460A (en) Address conversion unit
JPS5368916A (en) Display system
JPS55109056A (en) Data process system
JPS55119745A (en) Information processing unit
JPS5447541A (en) Information processor
JPS55157064A (en) Word memory system
JPS55164956A (en) Access system