JPS55164956A - Access system - Google Patents

Abstract

PURPOSE: To continuously store the address continuously even under erasing time of address signal fed from the microprocessor with a simple circuit, by temporarily storing the address signal to the latch circuit in accessing the memory element slow in access timer.

CONSTITUTION: The data bus ports D0WD3 of the microprocessor 1 are connected to the data bus ports D0WD3 of the memory elements 3, 4 and operation is made while taking synchronism between the access of the memory elements 3, 4 and the read-in timing. Further, the address bus ports A0WA4 of the processor 1 are connected to the address ports A0WA4 of the memory element 3, and the chip selection port CS of the memory element 3 is connected to the port A5 of the processor 1. Further, the address bus ports A0WA4 of the memory element 4 slow in the access time and the port CS are stored in the ports A0WA4 and A6 of the processor 1 via the latch circuit 2, and the address signal is latched to the circuit 2 at access of the memory element 4 for continuous access.

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