JPS5511688A - Code error detection/correction device - Google Patents
Code error detection/correction deviceInfo
- Publication number
- JPS5511688A JPS5511688A JP8558578A JP8558578A JPS5511688A JP S5511688 A JPS5511688 A JP S5511688A JP 8558578 A JP8558578 A JP 8558578A JP 8558578 A JP8558578 A JP 8558578A JP S5511688 A JPS5511688 A JP S5511688A
- Authority
- JP
- Japan
- Prior art keywords
- code
- output
- error
- gate
- clocks
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/24—Testing correct operation
- H04L1/245—Testing correct operation by using the properties of transmission codes
- H04L1/247—Testing correct operation by using the properties of transmission codes three-level transmission codes, e.g. ternary
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Dc Digital Transmission (AREA)
Abstract
PURPOSE:To secure the correction for the code error featuring the highest occurrence frequency by memorizing the data equivalent to the adjacent two clocks through the bipolar PCM code decoder circuit and then opening the gate by these two output ot generate the detection signals when the code error occurs. CONSTITUTION:The level comparison is carried out via comparator 1 and 2 between reference voltage VR1/VR2 and PCM reception signal S in order to obtain the + and - code output. These code output are then applied to n-nit shift register 3 consisting of n-units of D-FF to which timing extracting clock pulse (c) is applied. For the bipolar PCM code, the same code of 1 or - never continues by more than two clocks. Thus, in case the output of NAND gate 4 to which every adjacent two bits are supplied is O, some error exists to produce error detection information (e). When this signal is delivered from gate 4 or 4', corresponding FF5 and 5' are cleared forcedly to secure the output of O. Thus, the error can be corrected.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8558578A JPS5511688A (en) | 1978-07-12 | 1978-07-12 | Code error detection/correction device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8558578A JPS5511688A (en) | 1978-07-12 | 1978-07-12 | Code error detection/correction device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5511688A true JPS5511688A (en) | 1980-01-26 |
Family
ID=13862881
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8558578A Pending JPS5511688A (en) | 1978-07-12 | 1978-07-12 | Code error detection/correction device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5511688A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57150248A (en) * | 1981-03-12 | 1982-09-17 | Nec Corp | Bipolar code error detecting circuit |
JPH01254248A (en) * | 1988-04-01 | 1989-10-11 | Mitsubishi Kasei Corp | Complex separation agent and manufacture thereof |
-
1978
- 1978-07-12 JP JP8558578A patent/JPS5511688A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57150248A (en) * | 1981-03-12 | 1982-09-17 | Nec Corp | Bipolar code error detecting circuit |
JPH0140539B2 (en) * | 1981-03-12 | 1989-08-29 | Nippon Electric Co | |
JPH01254248A (en) * | 1988-04-01 | 1989-10-11 | Mitsubishi Kasei Corp | Complex separation agent and manufacture thereof |
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