JPS55113961A - Measuring apparatus - Google Patents

Measuring apparatus

Info

Publication number
JPS55113961A
JPS55113961A JP2218179A JP2218179A JPS55113961A JP S55113961 A JPS55113961 A JP S55113961A JP 2218179 A JP2218179 A JP 2218179A JP 2218179 A JP2218179 A JP 2218179A JP S55113961 A JPS55113961 A JP S55113961A
Authority
JP
Japan
Prior art keywords
sample
analog signal
alternatively
memory circuits
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2218179A
Other languages
Japanese (ja)
Inventor
Yasuhiro Kamikubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2218179A priority Critical patent/JPS55113961A/en
Publication of JPS55113961A publication Critical patent/JPS55113961A/en
Pending legal-status Critical Current

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  • Measurement Of Current Or Voltage (AREA)

Abstract

PURPOSE: To exactly record the maximum value of an irregular input signal by storing the past maximum data alternatively by first and second memory circuits.
CONSTITUTION: The first and second sample-holding circuits 6a, 6b receiving analog signal from an analog signal input terminal 1 always sample and hold the input signals. The first and second A/D converters 7a, 7b receiving outputs from the first and second sample-holding circuits 6a, 6b, respectively apply the A/D conversion output to the first and second memory circuits 8a, 8b, respectively. When the analog signal exceeds the predetermined value, a trigger level detector 2 produces an output, which alternatively operates the first and second address counters 9a, 9b. The first and second memory circuits 8a, 8b alternatively hold the past maximum data to record the data in a recorder 12.
COPYRIGHT: (C)1980,JPO&Japio
JP2218179A 1979-02-26 1979-02-26 Measuring apparatus Pending JPS55113961A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2218179A JPS55113961A (en) 1979-02-26 1979-02-26 Measuring apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2218179A JPS55113961A (en) 1979-02-26 1979-02-26 Measuring apparatus

Publications (1)

Publication Number Publication Date
JPS55113961A true JPS55113961A (en) 1980-09-02

Family

ID=12075618

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2218179A Pending JPS55113961A (en) 1979-02-26 1979-02-26 Measuring apparatus

Country Status (1)

Country Link
JP (1) JPS55113961A (en)

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