JPS5495141A - Fault detector - Google Patents

Fault detector

Info

Publication number
JPS5495141A
JPS5495141A JP244978A JP244978A JPS5495141A JP S5495141 A JPS5495141 A JP S5495141A JP 244978 A JP244978 A JP 244978A JP 244978 A JP244978 A JP 244978A JP S5495141 A JPS5495141 A JP S5495141A
Authority
JP
Japan
Prior art keywords
fault
logical operation
operation circuit
memory
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP244978A
Other languages
Japanese (ja)
Inventor
Tachiki Ichihashi
Shigeo Nakatsuka
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP244978A priority Critical patent/JPS5495141A/en
Publication of JPS5495141A publication Critical patent/JPS5495141A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To detect the fault of a logical operation circuit in a simple constitution by storing previously fault detection information or fault kind-classified information in a memory and obtaining fault detection or fault kind-classified information for the logical operation circuit.
CONSTITUTION: Plural detection points 2a...2g are set in logical operation circuit 1, and memory 7 is provided which plural signals from detection points 2a...2g are inputted to and stores previously fault detection information or fault kind- classified information in an address position corresponding to the value of combination of signals defined as an abnormal state by combination of each signal. Then, the combination of plural signals from detection points of logical operation circuit 1 which is connected to memory 7 is used as an address signal of memory 7 to obtain fault detection information or fault kind-classified information for logical operation circuit 1. Thus, the fault of the logical operation circuit can be detected in a simple constitution.
COPYRIGHT: (C)1979,JPO&Japio
JP244978A 1978-01-13 1978-01-13 Fault detector Pending JPS5495141A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP244978A JPS5495141A (en) 1978-01-13 1978-01-13 Fault detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP244978A JPS5495141A (en) 1978-01-13 1978-01-13 Fault detector

Publications (1)

Publication Number Publication Date
JPS5495141A true JPS5495141A (en) 1979-07-27

Family

ID=11529581

Family Applications (1)

Application Number Title Priority Date Filing Date
JP244978A Pending JPS5495141A (en) 1978-01-13 1978-01-13 Fault detector

Country Status (1)

Country Link
JP (1) JPS5495141A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5725050A (en) * 1980-07-23 1982-02-09 Nippon Telegr & Teleph Corp <Ntt> Diagnostic system for logical operating circuit
JPS62195569A (en) * 1986-02-24 1987-08-28 Rohm Co Ltd Ic measuring instrument

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5725050A (en) * 1980-07-23 1982-02-09 Nippon Telegr & Teleph Corp <Ntt> Diagnostic system for logical operating circuit
JPS62195569A (en) * 1986-02-24 1987-08-28 Rohm Co Ltd Ic measuring instrument

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