JPS5513478A - Information process system - Google Patents

Information process system

Info

Publication number
JPS5513478A
JPS5513478A JP8626778A JP8626778A JPS5513478A JP S5513478 A JPS5513478 A JP S5513478A JP 8626778 A JP8626778 A JP 8626778A JP 8626778 A JP8626778 A JP 8626778A JP S5513478 A JPS5513478 A JP S5513478A
Authority
JP
Japan
Prior art keywords
processor
indication
register
power
freezing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8626778A
Other languages
Japanese (ja)
Inventor
Koichi Okumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8626778A priority Critical patent/JPS5513478A/en
Publication of JPS5513478A publication Critical patent/JPS5513478A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To realize a quick fault recovery process by registering the fixed information previously when the power source is faulty and at the same time securing the reading of the registered information.
CONSTITUTION: When the power source fault is detected at the side of information processor 1, the power cut-off warning signal is informed to register 2 from power control part 3 based on the fault detection signal which is given through power supply part 5 and power control part 6. At register 2, the synchronization is secured through FF40, and the freezing indication is given to processor 1 via connection 401. Receiving this indication, processor 1 is put immediately put under the freezing state, and at the same time gives the blocking indication to control circuit 9 for the new storing action in order to store the fixed information into resiters 80W8m from register groups 10W1m. After this, FF41 is turned on to give an indication of power cut-off to part 3. As a result, the fixed information of processor 1 at the freezing time can be registered assuredly in register 2.
COPYRIGHT: (C)1980,JPO&Japio
JP8626778A 1978-07-14 1978-07-14 Information process system Pending JPS5513478A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8626778A JPS5513478A (en) 1978-07-14 1978-07-14 Information process system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8626778A JPS5513478A (en) 1978-07-14 1978-07-14 Information process system

Publications (1)

Publication Number Publication Date
JPS5513478A true JPS5513478A (en) 1980-01-30

Family

ID=13882034

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8626778A Pending JPS5513478A (en) 1978-07-14 1978-07-14 Information process system

Country Status (1)

Country Link
JP (1) JPS5513478A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58137020A (en) * 1982-02-05 1983-08-15 Sharp Corp Electronic equipment driven by battery
JPS58137021A (en) * 1982-02-09 1983-08-15 Matsushita Electric Ind Co Ltd Reset circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58137020A (en) * 1982-02-05 1983-08-15 Sharp Corp Electronic equipment driven by battery
JPS58137021A (en) * 1982-02-09 1983-08-15 Matsushita Electric Ind Co Ltd Reset circuit

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