JPS5455481A - Frequency analyzer - Google Patents

Abstract

PURPOSE: To make it possible to accomplish the signal processing such as synchronous addition with the use of a simple construction by converting input signals into digital signals so that they may be subjected to digital signal processing such as the synchronous addition and they by reverting the digital signals to the analog signals so that their frequency components are divided with the use of a filter.

CONSTITUTION: The input signals to a buffer 10 are fed through a low-pass filter 30 to a calculator 40 so that they are sampled during the sampling period by an AD converter 31. Those input signals are converted into digital signals so that they may be stored in a memory 41. The signals thus stored are subjected to the necessary precessing such as a synchronous addition. The signals thus processed are read out for a preset readig time so that they may be reverted to analog signals by a DA converter 42. The analog signals are fed to a bond-pass filter 43, which has a center frequency F and a narrow band, so that the resultant output is fed through an effective calculating circuit 44 so as to have their effective value indicated in an indicator 45. On the other hand, an indicator 46 indicates the frequency which is extracted from such input signals as are determined by the sampling time, the reading time, and the frequency of the filter 43 so that they may be used for inspecting the trouble of an input signal source

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