JPS551109A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS551109A
JPS551109A JP7293078A JP7293078A JPS551109A JP S551109 A JPS551109 A JP S551109A JP 7293078 A JP7293078 A JP 7293078A JP 7293078 A JP7293078 A JP 7293078A JP S551109 A JPS551109 A JP S551109A
Authority
JP
Japan
Prior art keywords
terephthalic acid
film
insulating film
wirings
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7293078A
Other languages
Japanese (ja)
Inventor
Akira Abiru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7293078A priority Critical patent/JPS551109A/en
Publication of JPS551109A publication Critical patent/JPS551109A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE: To raise the voltage proof of an insulating film and reduce the parasitic capacitance between wirings, by coating a required part of a substrate with an insulating substance mixed with terephthalic acid and sublimating the terephthalic acid by heating so that the porous and thick insulating film is produced.
CONSTITUTION: The insulating substance mixed with the terephthalic acid is coated on a prescribed part of a first-layer electrode wiring 22 on the substrate 1. The terephthalic acid is then sublimated in a heat treatment process wherein a second- layer electrode wiring 4 and the insulating film 5 are produced. As a result, the film is made porous and thick. The voltage proof of the film is high. The parasitic capacitance between the wirings is low.
COPYRIGHT: (C)1980,JPO&Japio
JP7293078A 1978-06-16 1978-06-16 Manufacture of semiconductor device Pending JPS551109A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7293078A JPS551109A (en) 1978-06-16 1978-06-16 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7293078A JPS551109A (en) 1978-06-16 1978-06-16 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS551109A true JPS551109A (en) 1980-01-07

Family

ID=13503561

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7293078A Pending JPS551109A (en) 1978-06-16 1978-06-16 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS551109A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01137651A (en) * 1987-11-25 1989-05-30 Hitachi Ltd Semiconductor device
EP0333132A2 (en) * 1988-03-15 1989-09-20 Nec Corporation Semiconductor device having multilayered wiring structure with a small parasitic capacitance
JPH03105923A (en) * 1989-09-19 1991-05-02 Nec Corp Multilayer interconnection
WO1995032604A1 (en) * 1994-05-23 1995-11-30 General Electric Company Processing low dielectric constant materials for high speed electronics
EP0687004A1 (en) * 1994-06-07 1995-12-13 Texas Instruments Incorporated Method for fabrication of dielectrics on semiconductor devices
US5785787A (en) * 1994-05-23 1998-07-28 General Electric Company Processing low dielectric constant materials for high speed electronics

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01137651A (en) * 1987-11-25 1989-05-30 Hitachi Ltd Semiconductor device
EP0333132A2 (en) * 1988-03-15 1989-09-20 Nec Corporation Semiconductor device having multilayered wiring structure with a small parasitic capacitance
JPH03105923A (en) * 1989-09-19 1991-05-02 Nec Corp Multilayer interconnection
WO1995032604A1 (en) * 1994-05-23 1995-11-30 General Electric Company Processing low dielectric constant materials for high speed electronics
US5554305A (en) * 1994-05-23 1996-09-10 General Electric Company Processing low dielectric constant materials for high speed electronics
US5576517A (en) * 1994-05-23 1996-11-19 General Electric Company Low Dielectric constant materials for high speed electronics
US5785787A (en) * 1994-05-23 1998-07-28 General Electric Company Processing low dielectric constant materials for high speed electronics
US6297459B1 (en) 1994-05-23 2001-10-02 General Electric Company Processing low dielectric constant materials for high speed electronics
EP1484949A3 (en) * 1994-05-23 2004-12-15 General Electric Company Processing low dielectric constant materials for high speed electronics
EP0687004A1 (en) * 1994-06-07 1995-12-13 Texas Instruments Incorporated Method for fabrication of dielectrics on semiconductor devices

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