JPS55109174A - Rectifier circuit using field effect transistor - Google Patents

Rectifier circuit using field effect transistor

Info

Publication number
JPS55109174A
JPS55109174A JP1449479A JP1449479A JPS55109174A JP S55109174 A JPS55109174 A JP S55109174A JP 1449479 A JP1449479 A JP 1449479A JP 1449479 A JP1449479 A JP 1449479A JP S55109174 A JPS55109174 A JP S55109174A
Authority
JP
Japan
Prior art keywords
transistor
field effect
transistors
rectifier circuit
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1449479A
Other languages
Japanese (ja)
Inventor
Ikuo Ohashi
Yasuo Ohashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1449479A priority Critical patent/JPS55109174A/en
Publication of JPS55109174A publication Critical patent/JPS55109174A/en
Pending legal-status Critical Current

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  • Rectifiers (AREA)

Abstract

PURPOSE: To reduce the size of a rectifier circuit by employing two field effect transistors (FET) for a rectifier to enhance the efficiency of a switching regulator.
CONSTITUTION: The sources S of two field effect transistors FET9, 10 are commonly connected each other, and an electric current is applied from an AC power supply 11 between the drains D of the transistors. When the transistors 9, 10 are n-channel, the transistor 9 is conducted while the transistor 10 is turned off by the secondary auxiliary winding of a transformer 11 as the polarity of the power supply 1 is connected to the drain D of the transistor 9 and the negative polarity of the power supply 1 is connected to the drain D of the transistor 10. Thus, an electric current is flown to a reactor 4 and a load 7. When the above polarities are inverted, the transistor 9 is turned off while the transistor 10 is conducted, so that the energy of the reactor 4 is flown to the load. When the alternating current is rectified with the transistors 9, 10 to improve the linearity and accordingly the efficiency. Thus, the size of the rectifier circuit is reduced.
COPYRIGHT: (C)1980,JPO&Japio
JP1449479A 1979-02-09 1979-02-09 Rectifier circuit using field effect transistor Pending JPS55109174A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1449479A JPS55109174A (en) 1979-02-09 1979-02-09 Rectifier circuit using field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1449479A JPS55109174A (en) 1979-02-09 1979-02-09 Rectifier circuit using field effect transistor

Publications (1)

Publication Number Publication Date
JPS55109174A true JPS55109174A (en) 1980-08-22

Family

ID=11862601

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1449479A Pending JPS55109174A (en) 1979-02-09 1979-02-09 Rectifier circuit using field effect transistor

Country Status (1)

Country Link
JP (1) JPS55109174A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4519024A (en) * 1983-09-02 1985-05-21 At&T Bell Laboratories Two-terminal transistor rectifier circuit arrangement
US5038266A (en) * 1990-01-02 1991-08-06 General Electric Company High efficiency, regulated DC supply
US6026005A (en) * 1997-06-11 2000-02-15 International Rectifier Corp. Single ended forward converter with synchronous rectification and delay circuit in phase-locked loop
US6137698A (en) * 1997-09-30 2000-10-24 Shindengen Electric Manufacturing Co., Ltd. Switching power supply and method of controlling voltage induced across secondary winding of transformer

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS541887A (en) * 1977-06-06 1979-01-09 Mitsubishi Electric Corp Embedded conductive unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS541887A (en) * 1977-06-06 1979-01-09 Mitsubishi Electric Corp Embedded conductive unit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4519024A (en) * 1983-09-02 1985-05-21 At&T Bell Laboratories Two-terminal transistor rectifier circuit arrangement
US5038266A (en) * 1990-01-02 1991-08-06 General Electric Company High efficiency, regulated DC supply
US6026005A (en) * 1997-06-11 2000-02-15 International Rectifier Corp. Single ended forward converter with synchronous rectification and delay circuit in phase-locked loop
US6137698A (en) * 1997-09-30 2000-10-24 Shindengen Electric Manufacturing Co., Ltd. Switching power supply and method of controlling voltage induced across secondary winding of transformer

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