JPS5499581A - Arrangement decision device - Google Patents

Arrangement decision device

Info

Publication number
JPS5499581A
JPS5499581A JP639478A JP639478A JPS5499581A JP S5499581 A JPS5499581 A JP S5499581A JP 639478 A JP639478 A JP 639478A JP 639478 A JP639478 A JP 639478A JP S5499581 A JPS5499581 A JP S5499581A
Authority
JP
Japan
Prior art keywords
arrangement
parts
unit
circuit
clock signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP639478A
Other languages
Japanese (ja)
Other versions
JPS6046828B2 (en
Inventor
Kazuhiro Ueda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP53006394A priority Critical patent/JPS6046828B2/en
Publication of JPS5499581A publication Critical patent/JPS5499581A/en
Publication of JPS6046828B2 publication Critical patent/JPS6046828B2/en
Expired legal-status Critical Current

Links

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  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE: To reduce greatly the time required for decision of the arrangement by deciding directly the arrangement of the logic gates on the LSI chip as well as the IC's on the print circuit substrate by means of the hardware.
CONSTITUTION: Memory unit 21 composed of plural words is connected to arithmetic unit 22 possessing the functions for the addition and subtraction, the read/ write control and the register each via data signal line 23 and control signal line 24. At the same time, the 4-phase clock signal sent from clock signal generator circuit 25 is applied to arithmetic unit 22 via clock lines 26∼29. With such constitution of the circuit in the arrangement decision device, two actions are possible for the original arrangement phase and the replacement/improvement phase. In other words, the parts numbers, the numbers of the parts to be connected to the above mentioned parts and the information of the coordinates positions are given to unit 21 to perform the original arrangement, and then the clock signal from circuit 25 is applied to unit 22 to select the parts and then to carry out the arrangement calculation.
COPYRIGHT: (C)1979,JPO&Japio
JP53006394A 1978-01-24 1978-01-24 Placement determination device Expired JPS6046828B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53006394A JPS6046828B2 (en) 1978-01-24 1978-01-24 Placement determination device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53006394A JPS6046828B2 (en) 1978-01-24 1978-01-24 Placement determination device

Publications (2)

Publication Number Publication Date
JPS5499581A true JPS5499581A (en) 1979-08-06
JPS6046828B2 JPS6046828B2 (en) 1985-10-18

Family

ID=11637145

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53006394A Expired JPS6046828B2 (en) 1978-01-24 1978-01-24 Placement determination device

Country Status (1)

Country Link
JP (1) JPS6046828B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5880853A (en) * 1981-11-02 1983-05-16 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Optimizing system for element configuration
JP2013511092A (en) * 2009-11-12 2013-03-28 アルテラ コーポレイション Method and apparatus for performing hardware assisted placement
WO2022172609A1 (en) * 2021-02-10 2022-08-18 パナソニックＩｐマネジメント株式会社 Ai module

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5880853A (en) * 1981-11-02 1983-05-16 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Optimizing system for element configuration
JPH058575B2 (en) * 1981-11-02 1993-02-02 Intaanashonaru Bijinesu Mashiinzu Corp
JP2013511092A (en) * 2009-11-12 2013-03-28 アルテラ コーポレイション Method and apparatus for performing hardware assisted placement
WO2022172609A1 (en) * 2021-02-10 2022-08-18 パナソニックＩｐマネジメント株式会社 Ai module

Also Published As

Publication number Publication date
JPS6046828B2 (en) 1985-10-18

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