JPS5498141A - Input/output device starting system - Google Patents

Input/output device starting system

Info

Publication number
JPS5498141A
JPS5498141A JP438978A JP438978A JPS5498141A JP S5498141 A JPS5498141 A JP S5498141A JP 438978 A JP438978 A JP 438978A JP 438978 A JP438978 A JP 438978A JP S5498141 A JPS5498141 A JP S5498141A
Authority
JP
Japan
Prior art keywords
channel
control device
status
inquiry
inhibiting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP438978A
Other languages
Japanese (ja)
Other versions
JPS5844253B2 (en
Inventor
Mitsuhiro Yamaga
Akinori Kagotani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP53004389A priority Critical patent/JPS5844253B2/en
Publication of JPS5498141A publication Critical patent/JPS5498141A/en
Publication of JPS5844253B2 publication Critical patent/JPS5844253B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To smooth the start of I/O devices by reporting the channel status before the channel control device reads the channel program and inhibiting the asynchronous interrupt request of I/O devices when the channel can accept the start operation.
CONSTITUTION: The control part which accepted signal 21 generated in response to the inquiry of a channel control device places the channel status onto data bus 25 to the channel control device by controlling selector 24. This status is held in channel status latch 23. Flip-flop 27 is set when AND of the inquiry of the channel control device and the idle state in channel status latch 23 is fulfilled in gate 26, and the output signal is sent to the I/O interface control part in the channel, thus inhibiting the asynchronous interrupt processing request.
COPYRIGHT: (C)1979,JPO&Japio
JP53004389A 1978-01-20 1978-01-20 I/O device startup method Expired JPS5844253B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53004389A JPS5844253B2 (en) 1978-01-20 1978-01-20 I/O device startup method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53004389A JPS5844253B2 (en) 1978-01-20 1978-01-20 I/O device startup method

Publications (2)

Publication Number Publication Date
JPS5498141A true JPS5498141A (en) 1979-08-02
JPS5844253B2 JPS5844253B2 (en) 1983-10-01

Family

ID=11582991

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53004389A Expired JPS5844253B2 (en) 1978-01-20 1978-01-20 I/O device startup method

Country Status (1)

Country Link
JP (1) JPS5844253B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5076943A (en) * 1973-11-02 1975-06-24

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5076943A (en) * 1973-11-02 1975-06-24

Also Published As

Publication number Publication date
JPS5844253B2 (en) 1983-10-01

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