JPS5492152A - Fault diagnosis system - Google Patents
Fault diagnosis systemInfo
- Publication number
- JPS5492152A JPS5492152A JP15948177A JP15948177A JPS5492152A JP S5492152 A JPS5492152 A JP S5492152A JP 15948177 A JP15948177 A JP 15948177A JP 15948177 A JP15948177 A JP 15948177A JP S5492152 A JPS5492152 A JP S5492152A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- retrial
- control circuit
- operation state
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Retry When Errors Occur (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
PURPOSE: To obtain a diagnosis system which eliminates the need of diagnostic data and simplifies fault analysis, by providing a retrial control circuit which retries the operation of a diagnosed device, disgnostic control circuit which reads out the operation state, and a method which stores the operation state.
CONSTITUTION: When diagnosed device 1 generates an error during its operation, retrial control circuit 3 is actuated via error detection circuit 5 to give the instruction of the retrial of device 1. Diagnostic control circuit 2 collects the operation states of the retrials and counter 4 counts the number of retrials; and when circuit 3 starts the final retrial after the contents of counter 4 reaches the fixed number of times, FF11 is set via gate 10. Gate 9 stops clock signals and afterwards, circuit 2 supplies the signal to unit 1 clock by clock. Circuit 2 reads out operation states and stores them in memory circuit 8. By circuit 2, data stored in circuit 8 are sent out to simulator 6, simulation is performed on the basis of the data in the operation state, and its results are displayed on display unit 7 via buffer register 14, thereby making fault analysis.
COPYRIGHT: (C)1979,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52159481A JPS6029133B2 (en) | 1977-12-29 | 1977-12-29 | Fault diagnosis method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52159481A JPS6029133B2 (en) | 1977-12-29 | 1977-12-29 | Fault diagnosis method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5492152A true JPS5492152A (en) | 1979-07-21 |
JPS6029133B2 JPS6029133B2 (en) | 1985-07-09 |
Family
ID=15694704
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP52159481A Expired JPS6029133B2 (en) | 1977-12-29 | 1977-12-29 | Fault diagnosis method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6029133B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6319526U (en) * | 1986-07-25 | 1988-02-09 | ||
JPS63126907A (en) * | 1986-11-17 | 1988-05-30 | カネボウ株式会社 | Shoulder pad |
-
1977
- 1977-12-29 JP JP52159481A patent/JPS6029133B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS6029133B2 (en) | 1985-07-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0282039A3 (en) | Apparatus and method for diagnosing functions of a data processor | |
SU1408439A1 (en) | Addressing device for automatic configuration of computer memory | |
JPS5492152A (en) | Fault diagnosis system | |
JPS5481052A (en) | Operation support system of data processor | |
SU918962A1 (en) | Control system operator simulator | |
JPS5757065A (en) | Fault diagnostic processing system | |
JPS5541543A (en) | Cash automatic transaction unit | |
JPS5472909A (en) | Recording method for program passing trace of electronic switchboard | |
SU1615777A1 (en) | Device for assessing sensomotor activity of operator | |
SU1765841A1 (en) | Operator training device | |
SU955073A1 (en) | Digital system checking device | |
SU1714651A1 (en) | Device for operators training | |
SU943747A1 (en) | Device for checking digital integrated circuits | |
SU943812A1 (en) | Control system operator simulator | |
SU1721620A1 (en) | Device to train operators | |
SU660053A1 (en) | Microprocessor checking arrangement | |
SU932432A1 (en) | Data processing device | |
SU641456A1 (en) | Object automatic monitoring apparatus | |
SU1492367A1 (en) | Operatorъs training device | |
SU1223271A1 (en) | Device for checking working capability of radiotelegraph operator | |
SU847336A1 (en) | Trainer for operator of control systems | |
SU1095225A1 (en) | Device for displaying information | |
SU1320833A1 (en) | Device for teaching operators | |
SU1714654A1 (en) | Operator trainer | |
SU1437897A1 (en) | Operator training device |