JPS5486204A - Inter-module interface system - Google Patents

Inter-module interface system

Info

Publication number
JPS5486204A
JPS5486204A JP15480677A JP15480677A JPS5486204A JP S5486204 A JPS5486204 A JP S5486204A JP 15480677 A JP15480677 A JP 15480677A JP 15480677 A JP15480677 A JP 15480677A JP S5486204 A JPS5486204 A JP S5486204A
Authority
JP
Japan
Prior art keywords
program
data transfer
inter
processors
program modules
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15480677A
Other languages
English (en)
Other versions
JPS5733760B2 (ja
Inventor
Gisuke Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15480677A priority Critical patent/JPS5486204A/ja
Publication of JPS5486204A publication Critical patent/JPS5486204A/ja
Publication of JPS5733760B2 publication Critical patent/JPS5733760B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/5455Multi-processor, parallelism, distributed systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)
JP15480677A 1977-12-21 1977-12-21 Inter-module interface system Granted JPS5486204A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15480677A JPS5486204A (en) 1977-12-21 1977-12-21 Inter-module interface system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15480677A JPS5486204A (en) 1977-12-21 1977-12-21 Inter-module interface system

Publications (2)

Publication Number Publication Date
JPS5486204A true JPS5486204A (en) 1979-07-09
JPS5733760B2 JPS5733760B2 (ja) 1982-07-19

Family

ID=15592285

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15480677A Granted JPS5486204A (en) 1977-12-21 1977-12-21 Inter-module interface system

Country Status (1)

Country Link
JP (1) JPS5486204A (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5025147A (ja) * 1973-01-04 1975-03-17

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5025147A (ja) * 1973-01-04 1975-03-17

Also Published As

Publication number Publication date
JPS5733760B2 (ja) 1982-07-19

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