JPS5480167A - Frequency-voltage converter - Google Patents

Frequency-voltage converter

Info

Publication number
JPS5480167A
JPS5480167A JP14715177A JP14715177A JPS5480167A JP S5480167 A JPS5480167 A JP S5480167A JP 14715177 A JP14715177 A JP 14715177A JP 14715177 A JP14715177 A JP 14715177A JP S5480167 A JPS5480167 A JP S5480167A
Authority
JP
Japan
Prior art keywords
frequency
pulse
input
shift
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14715177A
Other languages
Japanese (ja)
Other versions
JPS5952787B2 (en
Inventor
Norio Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14715177A priority Critical patent/JPS5952787B2/en
Publication of JPS5480167A publication Critical patent/JPS5480167A/en
Publication of JPS5952787B2 publication Critical patent/JPS5952787B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Analogue/Digital Conversion (AREA)
  • Measuring Frequencies, Analyzing Spectra (AREA)

Abstract

PURPOSE: To enable the change in input pulse number or frequency to be immediately converted to a voltage by taking the frequency to be converted into a shifter at the timing shorter than the minimum period of that frequency thereby shifting the same.
CONSTITUTION: This is to output an input frequency S2 to an analog output voltage S3 proportional to the input, in which an oscillator 1 shifts the contents of a shift register 2 by each 1 bit to the right by a shift pulse S1. At each 1 shift time interval, whether the pulse of the input S2 of the shift register 2 is entered or not is checked and if there is the pulse S2, the Oth bit is set in ligic value 1 and if not, logic value 0 is set. This set value is shifted to the right by each 1 shift pulse. Hence, the number of the logic value 1 of each bit of the shift register 2 becomes the number of the input frequency S2 up to the 10 shift pulse time before from the present. This number is analog-converted by an adding resitor 3, operational amplifier 4 and resistor 5.
COPYRIGHT: (C)1979,JPO&Japio
JP14715177A 1977-12-09 1977-12-09 Frequency↓−voltage converter Expired JPS5952787B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14715177A JPS5952787B2 (en) 1977-12-09 1977-12-09 Frequency↓−voltage converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14715177A JPS5952787B2 (en) 1977-12-09 1977-12-09 Frequency↓−voltage converter

Publications (2)

Publication Number Publication Date
JPS5480167A true JPS5480167A (en) 1979-06-26
JPS5952787B2 JPS5952787B2 (en) 1984-12-21

Family

ID=15423731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14715177A Expired JPS5952787B2 (en) 1977-12-09 1977-12-09 Frequency↓−voltage converter

Country Status (1)

Country Link
JP (1) JPS5952787B2 (en)

Also Published As

Publication number Publication date
JPS5952787B2 (en) 1984-12-21

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